/external/compiler-rt/lib/builtins/ppc/ |
restFP.S | 32 lfd f23,-72(r1)
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saveFP.S | 30 stfd f23,-72(r1)
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/development/ndk/platforms/android-9/arch-mips/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-12/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-13/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-15/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-16/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-17/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-19/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
fpregdef.h | 52 #define fs1f $f23 94 #define ft11 $f23
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/development/ndk/sources/android/libportable/arch-mips/ |
_setjmp.S | 99 FPREG64_S($f23, JB_F23, a0) 112 swc1 $f23, JB_F23(a0) 156 FPREG64_L($f23, JB_F23, a0) 169 lwc1 $f23, JB_F23(a0)
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setjmp.S | 112 FPREG64_S($f23, JB_F23, a0) 125 swc1 $f23, JB_F23(a0) 186 FPREG64_L($f23, JB_F23, a0) 199 lwc1 $f23, JB_F23(a0)
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/external/llvm/test/MC/ARM/ |
symbol-variants.s | 77 .word f23(tlscall) 79 @ CHECK: 5c R_ARM_TLS_CALL f23
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/external/clang/test/CodeGenCXX/ |
aarch64-mangle-neon-vectors.cpp | 84 void f23(float64x2_t) {} function
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/external/llvm/test/MC/Mips/mips3/ |
invalid-mips4.s | 16 movf.s $f23,$f5,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 17 movf.s $f23,$f5,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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invalid-mips5.s | 17 movf.s $f23,$f5,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 18 movf.s $f23,$f5,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
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/external/chromium_org/third_party/openssl/openssl/crypto/ |
alphacpuid.pl | 56 fclr $f23
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/external/clang/test/CodeGen/ |
arm-arguments.c | 125 // APCS-GNU-LABEL: define i32 @f23() 131 // AAPCS-LABEL: define arm_aapcscc i32 @f23() 137 _Complex short f23(void) {} function
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/external/openssl/crypto/ |
alphacpuid.pl | 56 fclr $f23
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/bionic/libc/arch-mips/bionic/ |
_setjmp.S | 85 s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0) 129 l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
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/bionic/libc/arch-mips64/bionic/ |
_setjmp.S | 85 s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0) 129 l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
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