| /external/llvm/test/MC/AArch64/ |
| neon-scalar-cvt.s | 49 fcvtzs s21, s12, #1
50 fcvtzs d21, d12, #1
52 // CHECK: fcvtzs s21, s12, #1 // encoding: [0x95,0xfd,0x3f,0x5f]
53 // CHECK: fcvtzs d21, d12, #1 // encoding: [0x95,0xfd,0x7f,0x5f]
166 fcvtzs s12, s13
167 fcvtzs d21, d14
169 // CHECK: fcvtzs s12, s13 // encoding: [0xac,0xb9,0xa1,0x5e]
170 // CHECK: fcvtzs d21, d14 // encoding: [0xd5,0xb9,0xe1,0x5e]
|
| arm64-fp-encoding.s | 240 fcvtzs w1, s2
241 fcvtzs w1, s2, #1
242 fcvtzs w1, d2
243 fcvtzs w1, d2, #1
244 fcvtzs x1, s2
245 fcvtzs x1, s2, #1
246 fcvtzs x1, d2
247 fcvtzs x1, d2, #1
249 ; CHECK: fcvtzs w1, s2 ; encoding: [0x41,0x00,0x38,0x1e]
250 ; CHECK: fcvtzs w1, s2, #1 ; encoding: [0x41,0xfc,0x18,0x1e
[all...] |
| neon-simd-shift.s | 420 fcvtzs v0.2s, v1.2s, #3
421 fcvtzs v0.4s, v1.4s, #3
422 fcvtzs v0.2d, v1.2d, #3
428 // CHECK: fcvtzs v0.2s, v1.2s, #3 // encoding: [0x20,0xfc,0x3d,0x0f]
429 // CHECK: fcvtzs v0.4s, v1.4s, #3 // encoding: [0x20,0xfc,0x3d,0x4f]
430 // CHECK: fcvtzs v0.2d, v1.2d, #3 // encoding: [0x20,0xfc,0x7d,0x4f]
|
| neon-simd-misc.s | 561 fcvtzs v6.4s, v8.4s
562 fcvtzs v6.2d, v8.2d
563 fcvtzs v4.2s, v0.2s
565 // CHECK: fcvtzs v6.4s, v8.4s // encoding: [0x06,0xb9,0xa1,0x4e]
566 // CHECK: fcvtzs v6.2d, v8.2d // encoding: [0x06,0xb9,0xe1,0x4e]
567 // CHECK: fcvtzs v4.2s, v0.2s // encoding: [0x04,0xb8,0xa1,0x0e]
|
| basic-a64-instructions.s | [all...] |
| basic-a64-diagnostics.s | [all...] |
| arm64-advsimd.s | 749 fcvtzs.2s v0, v0
750 fcvtzs.4s v0, v0
751 fcvtzs.2d v0, v0
752 fcvtzs s0, s0
753 fcvtzs d0, d0
755 ; CHECK: fcvtzs.2s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x0e]
756 ; CHECK: fcvtzs.4s v0, v0 ; encoding: [0x00,0xb8,0xa1,0x4e]
757 ; CHECK: fcvtzs.2d v0, v0 ; encoding: [0x00,0xb8,0xe1,0x4e]
758 ; CHECK: fcvtzs s0, s0 ; encoding: [0x00,0xb8,0xa1,0x5e]
759 ; CHECK: fcvtzs d0, d0 ; encoding: [0x00,0xb8,0xe1,0x5e
[all...] |
| neon-diagnostics.s | [all...] |
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_advsimd_ColorMatrix.S | 423 fcvtzs v24.4s, v8.4s, #1
424 fcvtzs v25.4s, v9.4s, #1
425 fcvtzs v26.4s, v10.4s, #1
426 fcvtzs v27.4s, v11.4s, #1
427 fcvtzs v28.4s, v16.4s, #1
428 fcvtzs v29.4s, v17.4s, #1
429 fcvtzs v30.4s, v18.4s, #1
430 fcvtzs v31.4s, v19.4s, #1
461 fcvtzs v24.4s, v8.4s, #1
462 fcvtzs v25.4s, v9.4s, #
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-arm64.cc | [all...] |
| test-assembler-arm64.cc | [all...] |
| /external/vixl/test/ |
| test-disasm-a64.cc | [all...] |
| test-simulator-a64.cc | [all...] |
| test-assembler-a64.cc | [all...] |
| /external/chromium_org/v8/src/arm64/ |
| assembler-arm64.h | [all...] |
| macro-assembler-arm64-inl.h | 628 void MacroAssembler::Fcvtzs(const Register& rd, const FPRegister& fn) {
631 fcvtzs(rd, fn);
[all...] |
| assembler-arm64.cc | 1811 void Assembler::fcvtzs(const Register& rd, const FPRegister& fn) { function in class:v8::internal::Assembler
[all...] |
| /external/vixl/src/a64/ |
| assembler-a64.h | [all...] |
| macro-assembler-a64.h | 593 void Fcvtzs(const Register& rd, const FPRegister& fn) {
596 fcvtzs(rd, fn);
[all...] |
| assembler-a64.cc | 1481 void Assembler::fcvtzs(const Register& rd, const FPRegister& fn) { function in class:vixl::Assembler
[all...] |
