| /external/chromium_org/third_party/sqlite/src/src/ |
| expr.c | [all...] |
| update.c | 55 ** If parameter iReg is not negative, code an OP_RealAffinity instruction
56 ** on register iReg. This is used when an equivalent integer value is
60 void sqlite3ColumnDefault(Vdbe *v, Table *pTab, int i, int iReg){
74 if( iReg>=0 && pTab->aCol[i].affinity==SQLITE_AFF_REAL ){
75 sqlite3VdbeAddOp1(v, OP_RealAffinity, iReg);
609 int iReg; /* First register in set passed to OP_VUpdate */
647 iReg = ++pParse->nMem;
650 sqlite3VdbeAddOp3(v, OP_Column, ephemTab, 0, iReg);
651 sqlite3VdbeAddOp3(v, OP_Column, ephemTab, (pRowid?1:0), iReg+1);
653 sqlite3VdbeAddOp3(v, OP_Column, ephemTab, i+1+(pRowid!=0), iReg+2+i)
[all...] |
| where.c | [all...] |
| pragma.c | 464 int iReg;
467 iReg = ++pParse->nMem;
469 sqlite3VdbeAddOp2(v, OP_Pagecount, iDb, iReg);
471 sqlite3VdbeAddOp3(v, OP_MaxPgcnt, iDb, iReg, sqlite3Atoi(zRight));
473 sqlite3VdbeAddOp2(v, OP_ResultRow, iReg, 1);
[all...] |
| fkey.c | 341 int iReg = aiCol[i] + regData + 1;
342 sqlite3VdbeAddOp2(v, OP_IsNull, iReg, iOk);
[all...] |
| sqliteInt.h | [all...] |
| vdbe.c | 443 static void registerTrace(FILE *out, int iReg, Mem *p){
444 fprintf(out, "REG[%d] = ", iReg);
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIISelLowering.cpp | 155 MachineOperand iReg = MI->getOperand(1);
165 .addOperand(iReg)
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| SIISelLowering.cpp | 155 MachineOperand iReg = MI->getOperand(1);
165 .addOperand(iReg)
|
| /external/valgrind/main/VEX/priv/ |
| host_arm64_defs.h | 860 HReg iReg;
[all...] |
| host_arm_defs.h | 848 HReg iReg;
998 extern ARMInstr* ARMInstr_FPSCR ( Bool toFPSCR, HReg iReg );
|
| host_arm64_defs.c | [all...] |
| host_arm_defs.c | [all...] |
| /external/chromium_org/third_party/sqlite/amalgamation/ |
| sqlite3.c | [all...] |
| /external/sqlite/dist/orig/ |
| sqlite3.c | [all...] |
| /external/sqlite/dist/ |
| sqlite3.c | [all...] |
