| /external/llvm/test/MC/Mips/ |
| micromips-multiply-instructions.s | 14 # CHECK-EL: msub $4, $5 # encoding: [0xa4,0x00,0x3c,0xeb]
21 # CHECK-EB: msub $4, $5 # encoding: [0x00,0xa4,0xeb,0x3c]
25 msub $4, $5
|
| mips-dsp-instructions.s | 33 # CHECK: msub $ac3, $10, $11 # encoding: [0x71,0x4b,0x18,0x04]
44 # CHECK: msub $10, $11 # encoding: [0x71,0x4b,0x00,0x04]
81 msub $ac3, $10, $11
92 msub $10, $11
|
| micromips-fpu-instructions.s | 66 # CHECK-EL: msub.s $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x21,0x11]
67 # CHECK-EL: msub.d $f2, $f4, $f6, $f8 # encoding: [0x06,0x55,0x29,0x11]
129 # CHECK-EB: msub.s $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x21]
130 # CHECK-EB: msub.d $f2, $f4, $f6, $f8 # encoding: [0x55,0x06,0x11,0x29]
188 msub.s $f2, $f4, $f6, $f8
189 msub.d $f2, $f4, $f6, $f8
|
| mips-alu-instructions.s | 84 # CHECK: msub $6, $7 # encoding: [0x04,0x00,0xc7,0x70]
109 msub $6,$7
|
| mips64-alu-instructions.s | 80 # CHECK: msub $6, $7 # encoding: [0x04,0x00,0xc7,0x70]
105 msub $6,$7
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| invalid-mips32r2.s | 10 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips32.s | 24 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/chromium_org/third_party/WebKit/Source/core/css/ |
| mathml.css | 42 semantics > mi, semantics > mn, semantics > mo, semantics > mtext, semantics > mspace, semantics > ms, semantics > maligngroup, semantics > malignmark, semantics > mrow, semantics > mfrac, semantics > msqrt, semantics > mroot, semantics > mstyle, semantics > merror, semantics > mpadded, semantics > mphantom, semantics > mfenced, semantics > menclose, semantics > msub, semantics > msup, semantics > msubsup, semantics > munder, semantics > mover, semantics > munderover, semantics > mmultiscripts, semantics > mtable, semantics > mstack, semantics > mlongdiv, semantics > maction {
|
| /external/valgrind/main/none/tests/mips64/ |
| fpu_arithmetic.stdout.exp | [all...] |
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 18 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
19 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips4/ |
| invalid-mips64r2.s | 25 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
26 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64.s | 20 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5-wrong-error.s | 37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64.s | 21 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64r2.s | 29 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
30 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64/ |
| invalid-mips64r2.s | 19 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 46 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
47 msub.d $f10,$f1,$f31,$f18 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
48 msub.s $f12,$f19,$f10,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5-wrong-error.s | 37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| invalid-mips32.s | 39 msub $s7,$k1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 104 msub $s7,$k1
105 msub.d $f10,$f1,$f31,$f18
106 msub.s $f12,$f19,$f10,$f16
|
| /external/llvm/test/MC/Mips/mips1/ |
| invalid-mips5-wrong-error.s | 37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/llvm/test/MC/Mips/mips3/ |
| invalid-mips5-wrong-error.s | 37 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips5-wrong-error.s | 39 msub.ps $f12,$f14,$f29,$f17 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
|
| /external/chromium_org/chrome/browser/resources/chromeos/chromevox/speech_rules/ |
| mathml_store_rules.js | 144 'msub',
331 'mj-msub', 'default.default',
334 'self::span[@class="msub"]');
410 'mj-msub', 'self::span[@class="msubsup"]', 'CQFmathmlmsub');
|
| mathml_store_util.js | 91 * Returns MathML node if MathJax is msub.
96 return cvox.MathmlStoreUtil.checkMathjaxTag(jax, 'MSUB');
|
