/external/libunwind/src/ia64/ |
Grbs.c | 128 unw_word_t nregs, bsp = c->bsp, curr = c->rbs_curr, n; local 149 nregs = rse_num_regs (bsp, c->rbs_area[curr].end); 151 if (regs_to_skip < nregs) 170 regs_to_skip -= nregs; 199 rbs_cover_and_flush (struct cursor *c, unw_word_t nregs, 209 c->bsp = rse_skip_regs (bsp, nregs); 215 if (likely (n >= nregs)) 232 nregs -= n; /* account for registers already on the rbs */ 234 assert (rse_skip_regs (c->bsp, -nregs) == rse_skip_regs (rbs->end, 0)); 239 nregs += rse_num_regs (rbs->end, bsp) [all...] |
/external/elfutils/0.153/libdwfl/ |
dwfl_module_register_names.c | 74 int nregs = ebl_register_info (mod->ebl, -1, NULL, 0, local 77 for (int regno = 0; regno < nregs && likely (result == 0); ++regno)
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/ |
r600.h | 116 unsigned nregs; member in struct:r600_pipe_state 234 state->regs[state->nregs].value = value; 235 state->nregs++;
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r600_state_common.c | 465 for (int i = 0; i < rstate->nregs; i++) { [all...] |
/external/mesa3d/src/gallium/drivers/r600/ |
r600.h | 116 unsigned nregs; member in struct:r600_pipe_state 234 state->regs[state->nregs].value = value; 235 state->nregs++;
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r600_state_common.c | 465 for (int i = 0; i < rstate->nregs; i++) { [all...] |
/ndk/sources/host-tools/sed-4.2.1/sed/ |
regexp.c | 173 copy_regs (regs, pmatch, nregs) 176 int nregs; 179 int need_regs = nregs + 1; 199 for (i = 0; i < nregs; ++i)
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/external/elfutils/0.153/libdw/ |
dwarf_frame_register.c | 78 if (unlikely ((size_t) regno >= fs->nregs))
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cfi.c | 69 size_t size = offsetof (Dwarf_Frame, regs[original->nregs]); 102 if (fs->nregs <= reg) 113 bigger->nregs = reg + 1; 308 if (cie->initial_state->nregs > operand)
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cfi.h | 206 size_t nregs; member in struct:Dwarf_Frame_s
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/external/qemu/target-arm/ |
op_helper.c | 483 int nregs; member in struct:__anon33830 505 const int nregs = neon_ls_element_type[op].nregs; local 513 for (reg = 0; reg < nregs; reg++) { 514 if (interleave > 2 || (interleave == 2 && nregs == 2)) { 516 } else if (interleave == 2 && nregs == 4 && reg == 2) {
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helper.c | 365 int nregs; local 368 nregs = arm_feature(env, ARM_FEATURE_VFP3) ? 32 : 16; 369 if (reg < nregs) { 375 nregs += 16; 376 if (reg < nregs) { 382 switch (reg - nregs) { 392 int nregs; local 394 nregs = arm_feature(env, ARM_FEATURE_VFP3) ? 32 : 16; 395 if (reg < nregs) { 400 nregs += 16 [all...] |
/external/elfutils/0.153/backends/ |
ia64_retval.c | 100 inline int hfa (const Dwarf_Op *loc, int nregs) 106 return fpregs_used + nregs;
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/external/jemalloc/src/ |
stats.c | 87 uint32_t nregs; local 106 CTL_J_GET("arenas.bin.0.nregs", &nregs, uint32_t); 132 j, reg_size, nregs, run_size / page, 140 j, reg_size, nregs, run_size / page,
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tcache.c | 494 if ((arena_bin_info[i].nregs << 1) <= TCACHE_NSLOTS_SMALL_MAX) { 496 (arena_bin_info[i].nregs << 1);
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arena.c | 329 assert(run->nfree < bin_info->nregs); [all...] |
/ndk/sources/host-tools/sed-4.2.1/lib/ |
regexec.c | 58 Idx nregs, int regs_allocated) 71 Idx str_idx, Idx dest_node, Idx nregs, 428 Idx nregs; 458 nregs = 1; 462 nregs = regs->num_regs; 463 if (BE (nregs < 1, 0)) 467 nregs = 1; 471 nregs = bufp->re_nsub + 1; 472 pmatch = re_malloc (regmatch_t, nregs); 480 nregs, pmatch, eflags) 427 Idx nregs; local [all...] |
/art/compiler/utils/arm/ |
assembler_arm32.h | 190 void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 191 void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 192 void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 193 void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 354 void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond);
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assembler_thumb2.h | 219 void vpushs(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 220 void vpushd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 221 void vpops(SRegister reg, int nregs, Condition cond = AL) OVERRIDE; 222 void vpopd(DRegister reg, int nregs, Condition cond = AL) OVERRIDE; 412 void EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond);
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assembler_arm32.cc | 930 void Arm32Assembler::vpushs(SRegister reg, int nregs, Condition cond) { 931 EmitVPushPop(static_cast<uint32_t>(reg), nregs, true, false, cond); local 935 void Arm32Assembler::vpushd(DRegister reg, int nregs, Condition cond) { 936 EmitVPushPop(static_cast<uint32_t>(reg), nregs, true, true, cond); local 940 void Arm32Assembler::vpops(SRegister reg, int nregs, Condition cond) { 941 EmitVPushPop(static_cast<uint32_t>(reg), nregs, false, false, cond); local 945 void Arm32Assembler::vpopd(DRegister reg, int nregs, Condition cond) { 946 EmitVPushPop(static_cast<uint32_t>(reg), nregs, false, true, cond); local 950 void Arm32Assembler::EmitVPushPop(uint32_t reg, int nregs, bool push, bool dbl, Condition cond) { 952 CHECK_GT(nregs, 0) [all...] |
assembler_arm.h | 515 virtual void vpushs(SRegister reg, int nregs, Condition cond = AL) = 0; 516 virtual void vpushd(DRegister reg, int nregs, Condition cond = AL) = 0; 517 virtual void vpops(SRegister reg, int nregs, Condition cond = AL) = 0; 518 virtual void vpopd(DRegister reg, int nregs, Condition cond = AL) = 0;
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assembler_thumb2.cc | 1816 EmitVPushPop(static_cast<uint32_t>(reg), nregs, true, false, cond); local 1821 EmitVPushPop(static_cast<uint32_t>(reg), nregs, true, true, cond); local 1826 EmitVPushPop(static_cast<uint32_t>(reg), nregs, false, false, cond); local 1831 EmitVPushPop(static_cast<uint32_t>(reg), nregs, false, true, cond); local [all...] |
/external/jemalloc/test/unit/ |
mallctl.c | 109 assert_d_eq(mallctlnametomib("arenas.bin.0.nregs", mib, &miblen), 0, 329 TEST_ARENAS_BIN_CONSTANT(uint32_t, nregs, arena_bin_info[0].nregs);
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/external/valgrind/main/VEX/priv/ |
host_amd64_defs.h | 557 /* Do 'ffree' on %st(7) .. %st(7-nregs) */ 559 Int nregs; /* 1 <= nregs <= 7 */ member in struct:__anon35398::__anon35399::__anon35424 723 extern AMD64Instr* AMD64Instr_A87Free ( Int nregs );
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host_amd64_defs.c | 135 void getAllocableRegs_AMD64 ( Int* nregs, HReg** arr ) 138 *nregs = 6; 139 *arr = LibVEX_Alloc(*nregs * sizeof(HReg)); 149 *nregs = 20; 150 *arr = LibVEX_Alloc(*nregs * sizeof(HReg)); 813 AMD64Instr* AMD64Instr_A87Free ( Int nregs ) 817 i->Ain.A87Free.nregs = nregs; 818 vassert(nregs >= 1 && nregs <= 7) [all...] |