| /external/clang/test/CodeGen/ |
| ppc64-vector.c | 3 typedef short v2i16 __attribute__((vector_size (4))); typedef
13 v2i16 test_v2i16(v2i16 x)
|
| builtins-mips.c | 12 typedef short v2i16 __attribute__ ((vector_size(4))); typedef
17 v2i16 v2i16_r, v2i16_a, v2i16_b, v2i16_c;
352 v2i16_a = (v2i16) {0xffff, 0x2468};
353 v2i16_b = (v2i16) {0x1234, 0x1111};
356 v2i16_a = (v2i16) {0xffff, 0x2468};
357 v2i16_b = (v2i16) {0x1234, 0x1111};
392 v2i16_b = (v2i16) {0xffff, 0x1555};
393 v2i16_c = (v2i16) {0x1234, 0x3322};
397 v2i16_b = (v2i16) {0xffff, 0x1555};
398 v2i16_c = (v2i16) {0x1234, 0x3322}
[all...] |
| x86_32-arguments-darwin.c | 217 typedef unsigned short v2i16 __attribute__((__vector_size__(4))); typedef
221 v2i16 f54(v2i16 arg) { return arg+arg; }
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 73 v2i16 = 27, // 2 x i16 enumerator in enum:llvm::MVT::SimpleValueType
198 return (SimpleTy == MVT::v4i8 || SimpleTy == MVT::v2i16 ||
282 case v2i16:
345 case v2i16:
390 case v2i16:
528 if (NumElements == 2) return MVT::v2i16;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 317 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
320 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
331 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 },
334 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 4 },
348 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f32, 1 },
351 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f32, 1 },
362 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f64, 2 },
365 { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f64, 2 },
|
| AArch64ISelLowering.cpp | 307 // load, floating-point truncating stores, or v2i32->v2i16 truncating store.
438 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Expand);
[all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 145 case MVT::v2i16: return "v2i16";
213 case MVT::v2i16: return VectorType::get(Type::getInt16Ty(Context), 2);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 59 (int)MVT::v2i16,
87 (int)MVT::v2i16,
209 setOperationAction(ISD::UDIV, MVT::v2i16, Expand);
666 if (OVT == MVT::v2i16) {
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 244 { ISD::SINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
245 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
276 { ISD::SINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
277 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i16, 3 },
|
| ARMISelLowering.cpp | 569 MVT::v4i16, MVT::v2i16,
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 59 (int)MVT::v2i16,
87 (int)MVT::v2i16,
209 setOperationAction(ISD::UDIV, MVT::v2i16, Expand);
666 if (OVT == MVT::v2i16) {
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 62 MVT::SimpleValueType VecTys[2] = {MVT::v2i16, MVT::v4i8};
86 setOperationAction(ISD::MUL, MVT::v2i16, Legal);
873 if ((Ty != MVT::v2i16) && (Ty != MVT::v4i8))
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 86 case MVT::v2i16: return "MVT::v2i16";
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelLowering.cpp | 167 setTruncStoreAction(MVT::v2i32, MVT::v2i16, Custom);
223 setLoadExtAction(ISD::EXTLOAD, MVT::v2i16, Expand);
224 setLoadExtAction(ISD::SEXTLOAD, MVT::v2i16, Expand);
225 setLoadExtAction(ISD::ZEXTLOAD, MVT::v2i16, Expand);
[all...] |
| SIISelLowering.cpp | 126 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Custom);
[all...] |
| R600ISelLowering.cpp | 105 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Expand);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 59 case MVT::v2i16:
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 608 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v2i16, Custom);
[all...] |
