/external/llvm/test/MC/AArch64/ |
optional-hash.s | 14 // CHECK: fcmeq v0.2s, v31.2s, #0.0 15 fcmeq v0.2s, v31.2s, 0.0
|
neon-compare-instructions.s | 10 cmeq v1.16b, v31.16b, v8.16b 15 cmeq v3.2d, v31.2d, v21.2d 18 // CHECK: cmeq v1.16b, v31.16b, v8.16b // encoding: [0xe1,0x8f,0x28,0x6e] 23 // CHECK: cmeq v3.2d, v31.2d, v21.2d // encoding: [0xe3,0x8f,0xf5,0x6e] 32 cmhs v1.16b, v31.16b, v8.16b 37 cmhs v3.2d, v31.2d, v21.2d 40 cmls v1.16b, v8.16b, v31.16b 45 cmls v3.2d, v21.2d, v31.2d 48 // CHECK: cmhs v1.16b, v31.16b, v8.16b // encoding: [0xe1,0x3f,0x28,0x6e] 53 // CHECK: cmhs v3.2d, v31.2d, v21.2d // encoding: [0xe3,0x3f,0xf5,0x6e [all...] |
neon-simd-ldst-multi-elem.s | 10 st1 { v31.4s }, [sp] 14 st1 { v31.2s }, [sp] 18 // CHECK: st1 { v31.4s }, [sp] // encoding: [0xff,0x7b,0x00,0x4c] 22 // CHECK: st1 { v31.2s }, [sp] // encoding: [0xff,0x7b,0x00,0x0c] 30 st1 { v31.4s, v0.4s }, [sp] 34 st1 { v31.2s, v0.2s }, [sp] 38 // CHECK: st1 { v31.4s, v0.4s }, [sp] // encoding: [0xff,0xab,0x00,0x4c] 42 // CHECK: st1 { v31.2s, v0.2s }, [sp] // encoding: [0xff,0xab,0x00,0x0c] 47 st1 { v31.4s-v0.4s }, [sp] 51 st1 { v31.2s-v0.2s }, [sp [all...] |
neon-simd-ldst-one-elem.s | 10 ld1r { v31.4s }, [sp] 14 ld1r { v31.2s }, [sp] 18 // CHECK: ld1r { v31.4s }, [sp] // encoding: [0xff,0xcb,0x40,0x4d] 22 // CHECK: ld1r { v31.2s }, [sp] // encoding: [0xff,0xcb,0x40,0x0d] 31 ld2r { v31.4s, v0.4s }, [sp] 35 ld2r { v31.2s, v0.2s }, [sp] 36 ld2r { v31.1d, v0.1d }, [sp] 39 // CHECK: ld2r { v31.4s, v0.4s }, [sp] // encoding: [0xff,0xcb,0x60,0x4d] 43 // CHECK: ld2r { v31.2s, v0.2s }, [sp] // encoding: [0xff,0xcb,0x60,0x0d] 44 // CHECK: ld2r { v31.1d, v0.1d }, [sp] // encoding: [0xff,0xcf,0x60,0x0d [all...] |
neon-mov.s | 13 movi v31.2s, #1, lsl #24 27 // CHECK: movi v31.2s, #{{0x1|1}}, lsl #24 // encoding: [0x3f,0x64,0x00,0x0f] 48 mvni v31.4s, #1, lsl #24 62 // CHECK: mvni v31.4s, #{{0x1|1}}, lsl #24 // encoding: [0x3f,0x64,0x00,0x6f] 83 bic v31.8h, #1, lsl #8 97 // CHECK: bic v31.8h, #{{0x1|1}}, lsl #8 // encoding: [0x3f,0xb4,0x00,0x6f] 111 orr v31.4h, #1 125 // CHECK: orr v31.4h, #{{0x1|1}} // encoding: [0x3f,0x94,0x00,0x0f] 136 movi v31.4s, #1, msl #16 141 // CHECK: movi v31.4s, #{{0x1|1}}, msl #16 // encoding: [0x3f,0xd4,0x00,0x4f [all...] |
neon-facge-facgt.s | 9 facge v0.2s, v31.2s, v16.2s 12 facle v0.2s, v16.2s, v31.2s 16 // CHECK: facge v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xef,0x30,0x2e] 19 // CHECK: facge v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xef,0x30,0x2e] 27 facgt v31.4s, v29.4s, v28.4s 30 faclt v31.4s, v28.4s, v29.4s 34 // CHECK: facgt v31.4s, v29.4s, v28.4s // encoding: [0xbf,0xef,0xbc,0x6e] 37 // CHECK: facgt v31.4s, v29.4s, v28.4s // encoding: [0xbf,0xef,0xbc,0x6e]
|
neon-frsqrt-frecp.s | 8 frsqrts v0.2s, v31.2s, v16.2s 12 // CHECK: frsqrts v0.2s, v31.2s, v16.2s // encoding: [0xe0,0xff,0xb0,0x0e] 19 frecps v31.4s, v29.4s, v28.4s 23 // CHECK: frecps v31.4s, v29.4s, v28.4s // encoding: [0xbf,0xff,0x3c,0x4e]
|
neon-simd-post-ldst-multi-elem.s | 10 ld1 { v31.4s }, [sp], #16 14 ld1 { v31.2s }, [sp], #8 20 // CHECK: ld1 { v31.4s }, [sp], #16 28 // CHECK: ld1 { v31.2s }, [sp], #8 39 ld1 { v31.4s, v0.4s }, [sp], #32 43 ld1 { v31.2s, v0.2s }, [sp], #16 49 // CHECK: ld1 { v31.4s, v0.4s }, [sp], #32 57 // CHECK: ld1 { v31.2s, v0.2s }, [sp], #16 68 ld1 { v31.4s, v0.4s, v1.4s }, [sp], #48 72 ld1 { v31.2s, v0.2s, v1.2s }, [sp], #2 [all...] |
neon-scalar-dup.s | 9 dup h5, v31.h[7] 21 // CHECK: {{dup|mov}} h5, v31.h[7] // encoding: [0xe5,0x07,0x1e,0x5e] 36 mov h5, v31.h[7] 48 // CHECK: {{dup|mov}} h5, v31.h[7] // encoding: [0xe5,0x07,0x1e,0x5e]
|
neon-tbl.s | 13 tbl v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b 19 // CHECK: tbl v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b // encoding: [0xe0,0x63,0x02,0x0e] 25 tbl v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b 31 // CHECK: tbl v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b // encoding: [0xc0,0x63,0x02,0x4e] 37 tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b 43 // CHECK: tbx v0.8b, { v31.16b, v0.16b, v1.16b, v2.16b }, v2.8b // encoding: [0xe0,0x73,0x02,0x0e] 49 tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b 55 // CHECK: tbx v0.16b, { v30.16b, v31.16b, v0.16b, v1.16b }, v2.16b // encoding: [0xc0,0x73,0x02,0x4e]
|
neon-simd-misc.s | 9 rev64 v0.16b, v31.16b 16 // CHECK: rev64 v0.16b, v31.16b // encoding: [0xe0,0x0b,0x20,0x4e] 23 rev32 v30.16b, v31.16b 28 // CHECK: rev32 v30.16b, v31.16b // encoding: [0xfe,0x0b,0x20,0x6e] 33 rev16 v30.16b, v31.16b 36 // CHECK: rev16 v30.16b, v31.16b // encoding: [0xfe,0x1b,0x20,0x4e] 115 suqadd v0.16b, v31.16b 123 // CHECK: suqadd v0.16b, v31.16b // encoding: [0xe0,0x3b,0x20,0x4e] 135 usqadd v0.16b, v31.16b 143 // CHECK: usqadd v0.16b, v31.16b // encoding: [0xe0,0x3b,0x20,0x6e [all...] |
neon-mul-div-instructions.s | 48 pmul v17.8b, v31.8b, v16.8b 51 // CHECK: pmul v17.8b, v31.8b, v16.8b // encoding: [0xf1,0x9f,0x30,0x2e] 81 fmulx v31.2d, v22.2d, v2.2d 85 // CHECK: fmulx v31.2d, v22.2d, v2.2d // encoding: [0xdf,0xde,0x62,0x4e]
|
neon-scalar-by-elem-saturating-mla.s | 30 sqdmlsl d31, s31, v31.s[2] 38 // CHECK: sqdmlsl d31, s31, v31.s[2] // encoding: [0xff,0x7b,0x9f,0x5f]
|
neon-scalar-by-elem-saturating-mul.s | 11 sqdmull d31, s31, v31.s[3] 20 // CHECK: sqdmull d31, s31, v31.s[3] // encoding: [0xff,0xbb,0xbf,0x5f]
|
/external/libhevc/common/arm64/ |
ihevc_inter_pred_luma_vert_w16inp_w16out.s | 214 smull v31.4s,v4.4h,v23.4h 215 smlal v31.4s,v3.4h,v22.4h 216 smlal v31.4s,v5.4h,v24.4h 217 smlal v31.4s,v6.4h,v25.4h 219 smlal v31.4s,v7.4h,v26.4h 221 smlal v31.4s,v16.4h,v27.4h 223 smlal v31.4s,v17.4h,v28.4h 225 smlal v31.4s,v18.4h,v29.4h 256 sub v31.4S, v31.4s, v30.4 [all...] |
ihevc_sao_band_offset_luma.s | 106 dup v31.8b,w11 //band_pos 124 ADD v5.8b, v1.8b , v31.8b //band_table.val[0] = vadd_u8(band_table.val[0], band_pos) 127 ADD v6.8b, v2.8b , v31.8b //band_table.val[1] = vadd_u8(band_table.val[1], band_pos) 130 ADD v7.8b, v3.8b , v31.8b //band_table.val[2] = vadd_u8(band_table.val[2], band_pos) 133 ADD v21.8b, v4.8b , v31.8b //band_table.val[3] = vadd_u8(band_table.val[3], band_pos) 213 SUB v14.8b, v13.8b , v31.8b //vsub_u8(au1_cur_row, band_pos) 216 SUB v16.8b, v15.8b , v31.8b //vsub_u8(au1_cur_row, band_pos) 219 SUB v18.8b, v17.8b , v31.8b //vsub_u8(au1_cur_row, band_pos) 222 SUB v20.8b, v19.8b , v31.8b //vsub_u8(au1_cur_row, band_pos)
|
ihevc_itrans_recon_8x8.s | 422 trn2 v31.4h, v3.4h, v7.4h ////[x3,x1],[x2,x0] first qudrant transposing 424 trn1 v6.2s, v29.2s, v31.2s 425 trn2 v7.2s, v29.2s, v31.2s ////x0,x1,x2,x3 first qudrant transposing continued..... 434 trn2 v31.4h, v11.4h, v15.4h ////[x7,x5],[x6,x4] third qudrant transposing 438 trn1 v14.2s, v29.2s, v31.2s 439 trn2 v15.2s, v29.2s, v31.2s ////x4,x5,x6,x7 third qudrant transposing continued..... 503 trn2 v31.4h, v4.4h, v5.4h 507 trn1 v3.2s, v29.2s, v31.2s 508 trn2 v5.2s, v29.2s, v31.2s 513 trn2 v31.4h, v8.4h, v9.4 [all...] |
ihevc_itrans_recon_4x4.s | 162 sqrshrn v31.4h, v20.4s,#shift_stage1_idct //pi2_out[3] = clip_s16((e[0] - o[0] + add)>>shift) ) 166 trn1 v26.4h, v30.4h, v31.4h 167 trn2 v27.4h, v30.4h, v31.4h 197 sqrshrn v31.4h, v20.4s,#shift_stage2_idct //pi2_out[3] = clip_s16((e[0] - o[0] + add)>>shift) ) 202 trn1 v26.4h, v30.4h, v31.4h 203 trn2 v27.4h, v30.4h, v31.4h
|
ihevc_sao_band_offset_chroma.s | 127 dup v31.8b,w6 //band_pos_u 141 ADD v5.8b, v1.8b , v31.8b //band_table_u.val[0] = vadd_u8(band_table_u.val[0], sao_band_pos_u) 144 ADD v6.8b, v2.8b , v31.8b //band_table_u.val[1] = vadd_u8(band_table_u.val[1], sao_band_pos_u) 147 ADD v7.8b, v3.8b , v31.8b //band_table_u.val[2] = vadd_u8(band_table_u.val[2], sao_band_pos_u) 150 ADD v8.8b, v4.8b , v31.8b //band_table_u.val[3] = vadd_u8(band_table_u.val[3], sao_band_pos_u) 313 SUB v7.8b, v5.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 319 SUB v15.8b, v13.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 325 SUB v19.8b, v17.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 331 SUB v23.8b, v21.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u) 368 SUB v7.8b, v5.8b , v31.8b //vsub_u8(au1_cur_row_deint.val[0], band_pos_u [all...] |
ihevc_itrans_recon_4x4_ttype1.s | 162 sqrshrn v31.4h, v20.4s,#shift_stage1_idct // (pi2_out[3] + rounding ) >> shift_stage1_idct 167 trn1 v26.4h, v30.4h, v31.4h 168 trn2 v27.4h, v30.4h, v31.4h 206 sqrshrn v31.4h, v20.4s,#shift_stage2_idct // (pi2_out[3] + rounding ) >> shift_stage1_idct 210 trn1 v26.4h, v30.4h, v31.4h 211 trn2 v27.4h, v30.4h, v31.4h
|
/external/chromium_org/third_party/libvpx/source/libvpx/vp8/common/ppc/ |
platform_altivec.asm | 39 W v31, r3 57 R v31, r3
|
/external/libvpx/libvpx/vp8/common/ppc/ |
platform_altivec.asm | 39 W v31, r3 57 R v31, r3
|
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
platform_altivec.asm | 39 W v31, r3 57 R v31, r3
|
/cts/tests/tests/jni/src/android/jni/cts/ |
InstanceFromNative.java | 89 int v30, int v31, int v32, int v33, int v34, 103 (v30 == 30) && (v31 == 31) && (v32 == 32) && (v33 == 33) &&
|
StaticFromNative.java | 86 int v30, int v31, int v32, int v33, int v34, 100 (v30 == 30) && (v31 == 31) && (v32 == 32) && (v33 == 33) &&
|