/external/llvm/lib/CodeGen/AsmPrinter/ |
AsmPrinter.cpp | 380 unsigned Align = 1 << AlignLog; 385 Align = 0; 388 OutStreamer.EmitCommonSymbol(GVSym, Size, Align); 397 OutStreamer.EmitZerofill(TheSection, GVSym, Size, Align); 403 // cases (e.g. when Align == 1), the external assembler might enfore 409 OutStreamer.EmitLocalCommonSymbol(GVSym, Size, Align); 414 Align = 0; 419 OutStreamer.EmitCommonSymbol(GVSym, Size, Align); [all...] |
/external/llvm/lib/Object/ |
MachOObjectFile.cpp | 72 sys::swapByteOrder(S.align); 85 sys::swapByteOrder(S.align); 721 uint32_t Align; 724 Align = Sect.align; 727 Align = Sect.align; 730 Res = uint64_t(1) << Align; [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64FastISel.cpp | 225 unsigned Align = DL.getPrefTypeAlignment(CFP->getType()); 226 if (Align == 0) 227 Align = DL.getTypeAllocSize(CFP->getType()); 229 unsigned Idx = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMConstantIslandPass.cpp | 58 AlignConstantIslands("arm-align-constant-islands", cl::Hidden, cl::init(true), 59 cl::desc("Align constant islands in code")); 116 /// PostAlign - When non-zero, the block terminator contains a .align 536 unsigned Align = CPs[i].getAlignment(); 537 assert(isPowerOf2_32(Align) && "Invalid alignment"); 540 assert((Size % Align) == 0 && "CP Entry not multiple of 4 bytes!"); 543 unsigned LogAlign = Log2_32(Align); 562 << Size << ", align = " << Align <<'\n'); 611 unsigned Align = MCP->getConstants()[CPI].getAlignment() [all...] |
ARMISelDAGToDAG.cpp | 155 bool SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr,SDValue &Align); 275 SDValue GetVLDSTAlign(SDValue Align, unsigned NumVecs, bool is64BitVector); [all...] |
ARMLoadStoreOptimizer.cpp | [all...] |
ARMBaseInstrInfo.cpp | 643 // FIXME: Constant island pass should insert an "ALIGN" instruction 804 unsigned Align = MFI.getObjectAlignment(FI); 810 Align); 853 if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) { 870 if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) { 889 if (Align >= 16 && getRegisterInfo().canRealignStack(MF)) { [all...] |
ARMFastISel.cpp | 190 unsigned ARMLowerPICELF(const GlobalValue *GV, unsigned Align, MVT VT); 494 unsigned Align = DL.getPrefTypeAlignment(CFP->getType()); 495 if (Align == 0) { 497 Align = DL.getTypeAllocSize(CFP->getType()); 499 unsigned Idx = MCP.getConstantPoolIndex(cast<Constant>(CFP), Align); 552 unsigned Align = DL.getPrefTypeAlignment(C->getType()); 553 if (Align == 0) { 555 Align = DL.getTypeAllocSize(C->getType()); 557 unsigned Idx = MCP.getConstantPoolIndex(C, Align); 612 unsigned Align = DL.getPrefTypeAlignment(GV->getType()) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | 69 unsigned Align; // CP alignment. 75 JT(-1), Align(0), SymbolFlags(X86II::MO_NO_FLAG) { 135 dbgs() << " JT" << JT << " Align" << Align << '\n'; 254 AM.Align, AM.Disp, AM.SymbolFlags); 671 AM.Align = CP->getAlignment(); 712 AM.Align = CP->getAlignment(); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/llvm/lib/Transforms/Instrumentation/ |
DataFlowSanitizer.cpp | 290 Value *loadShadow(Value *ShadowAddr, uint64_t Size, uint64_t Align, 292 void storeShadow(Value *Addr, uint64_t Size, uint64_t Align, Value *Shadow, [all...] |
/external/llvm/lib/Transforms/Scalar/ |
ScalarReplAggregates.cpp | [all...] |
/external/skia/include/core/ |
SkPaint.h | 676 enum Align { 685 /** Return the paint's Align value for drawing text. 686 @return the paint's Align value for drawing text. 688 Align getTextAlign() const { return (Align)fTextAlign; } 691 @param align set the paint's Align value for drawing text. 693 void setTextAlign(Align align); [all...] |
/frameworks/base/graphics/java/android/graphics/ |
Paint.java | 70 static final Align[] sAlignArray = { 71 Align.LEFT, Align.CENTER, Align.RIGHT 393 * Align specifies how drawText aligns its text relative to the 396 public enum Align { 410 private Align(int nativeInt) { [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
BitcodeReader.cpp | [all...] |
/external/chromium_org/v8/src/arm/ |
assembler-arm.cc | 343 NeonMemOperand::NeonMemOperand(Register rn, AddrMode am, int align) { 347 SetAlignment(align); 351 NeonMemOperand::NeonMemOperand(Register rn, Register rm, int align) { 354 SetAlignment(align); 358 void NeonMemOperand::SetAlignment(int align) { 359 switch (align) { 507 void Assembler::Align(int m) { 517 Align(8); [all...] |
/external/chromium_org/v8/src/arm64/ |
assembler-arm64.cc | 46 // Always align csp in cross compiled code - this is safe and ensures that 356 void Assembler::Align(int m) { [all...] |
/external/chromium_org/v8/src/mips/ |
assembler-mips.cc | 318 void Assembler::Align(int m) { 329 Align(4); [all...] |
/external/clang/lib/CodeGen/ |
CGCall.cpp | [all...] |
CGClass.cpp | 451 CharUnits Align = CGF.getContext().getTypeAlignInChars(T); 452 LV.setAlignment(std::min(Align, LV.getAlignment())); [all...] |
CodeGenModule.cpp | [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 528 O << ".param .align " 553 unsigned align = 0; local 557 if (!llvm::getAlign(*CallI, i + 1, align)) 558 align = TD->getABITypeAlignment(Ty); 560 O << ".param .align " << align << " .b8 "; local 592 unsigned align = Outs[OIdx].Flags.getByValAlign(); local 594 O << ".param .align " << align << " .b8 "; local 608 unsigned Align = 0 703 unsigned align = getArgumentAlignment(Callee, CS, Ty, paramCount + 1); local 741 unsigned align = getArgumentAlignment(Callee, CS, Ty, paramCount + 1); local [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 722 unsigned Align = Flags.getByValAlign(); 724 int FI = MFI->CreateStackObject(Size, Align, false); 728 Chain = DAG.getMemcpy(Chain, dl, FIPtr, Arg, SizeNode, Align, [all...] |