| /external/llvm/lib/Transforms/Utils/ |
| CloneFunction.cpp | 262 const DataLayout *DL;
269 const DataLayout *DL)
272 NameSuffix(nameSuffix), CodeInfo(codeInfo), DL(DL) {
329 if (Value *V = SimplifyInstruction(NewInst, DL)) {
425 const DataLayout *DL,
436 NameSuffix, CodeInfo, DL);
566 recursivelySimplifyInstruction(PN, DL);
|
| LoopUnroll.cpp | 494 const DataLayout *DL = DLP ? &DLP->getDataLayout() : nullptr;
496 simplifyLoop(OuterL, DT, LI, PP, /*AliasAnalysis*/ nullptr, SE, DL);
|
| SimplifyIndVar.cpp | 51 const DataLayout *DL; // May be NULL
66 DL = DLP ? &DLP->getDataLayout() : nullptr;
|
| LoopSimplify.cpp | 478 const DataLayout *DL) {
677 if (!FoldBranchToCommonDest(BI, DL)) continue;
715 const DataLayout *DL) {
733 SE, PP, DL);
751 const DataLayout *DL;
796 DL = DLP ? &DLP->getDataLayout() : nullptr;
800 Changed |= simplifyLoop(*I, DT, LI, this, AA, SE, DL);
[all...] |
| SSAUpdater.cpp | 164 DebugLoc DL;
166 DL = I->getDebugLoc();
167 InsertedPHI->setDebugLoc(DL);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 53 DebugLoc DL, SelectionDAG &DAG,
70 DebugLoc DL, SelectionDAG &DAG) const
72 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain);
105 DebugLoc DL = Op.getDebugLoc();
113 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1));
115 return DAG.getNode(ISD::FABS, DL, VT, Op.getOperand(1));
119 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1));
121 return DAG.getNode(AMDGPUISD::MAD, DL, VT, Op.getOperand(1),
124 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1),
127 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1)
[all...] |
| R600ISelLowering.cpp | 278 DebugLoc DL = Op.getDebugLoc();
288 return LowerImplicitParameter(DAG, VT, DL, 0);
290 return LowerImplicitParameter(DAG, VT, DL, 1);
292 return LowerImplicitParameter(DAG, VT, DL, 2);
294 return LowerImplicitParameter(DAG, VT, DL, 3);
296 return LowerImplicitParameter(DAG, VT, DL, 4);
298 return LowerImplicitParameter(DAG, VT, DL, 5);
300 return LowerImplicitParameter(DAG, VT, DL, 6);
302 return LowerImplicitParameter(DAG, VT, DL, 7);
304 return LowerImplicitParameter(DAG, VT, DL, 8)
[all...] |
| SIISelLowering.cpp | 297 DebugLoc DL = Op.getDebugLoc();
299 SDValue OpNode = DAG.getNode(VCCNode, DL, MVT::i64,
300 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64,
302 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64,
305 return DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i1, OpNode);
382 DebugLoc DL = Op.getDebugLoc();
384 SDValue Cond = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, CC);
385 return DAG.getNode(ISD::SELECT, DL, VT, Cond, True, False);
395 DebugLoc DL = N->getDebugLoc();
409 return DAG.getNode(ISD::SETCC, DL, VT, N->getOperand(0)
[all...] |
| /art/compiler/utils/x86/ |
| constants_x86.h | 33 DL = 2,
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 361 DebugLoc DL = Op.getDebugLoc();
363 DL,
386 DL,
397 DL,
408 DL,
424 DebugLoc DL = Op.getDebugLoc();
434 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data);
440 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift);
442 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift);
446 Data = DAG.getSExtOrTrunc(Data, DL, Op.getOperand(0).getValueType())
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| MemoryDependenceAnalysis.h | 326 const DataLayout *DL;
419 const DataLayout &DL);
|
| ScalarEvolution.h | 230 const DataLayout *DL;
[all...] |
| /external/llvm/include/llvm/IR/ |
| DataLayout.h | 187 DataLayout(const DataLayout &DL) : LayoutMap(nullptr) { *this = DL; }
189 DataLayout &operator=(const DataLayout &DL) {
191 LittleEndian = DL.isLittleEndian();
192 StackNaturalAlign = DL.StackNaturalAlign;
193 ManglingMode = DL.ManglingMode;
194 LegalIntWidths = DL.LegalIntWidths;
195 Alignments = DL.Alignments;
196 Pointers = DL.Pointers;
460 DataLayout DL;
[all...] |
| /external/llvm/lib/Target/ARM/ |
| A15SDOptimizer.cpp | 66 DebugLoc DL,
72 DebugLoc DL,
78 DebugLoc DL,
83 DebugLoc DL,
88 DebugLoc DL, unsigned DReg, unsigned Lane,
93 DebugLoc DL);
427 DebugLoc DL,
433 DL,
446 DebugLoc DL,
452 DL,
[all...] |
| ARMBaseRegisterInfo.cpp | 400 DebugLoc dl,
411 BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp))
588 DebugLoc DL; // Defaults to "unknown"
590 DL = Ins->getDebugLoc();
598 MachineInstrBuilder MIB = AddDefaultPred(BuildMI(*MBB, Ins, DL, MCID, BaseReg)
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelLowering.cpp | 521 DebugLoc DL = MI->getDebugLoc();
552 BuildMI(BB, DL, TII->get(Opc)).addReg(MI->getOperand(3).getReg())
568 BuildMI(*BB, BB->begin(), DL,
583 DebugLoc DL = MI->getDebugLoc();
614 BuildMI(BB, DL, TII->get(Opc2)).addReg(MI->getOperand(3).getReg())
616 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB);
631 BuildMI(*BB, BB->begin(), DL,
647 DebugLoc DL = MI->getDebugLoc();
678 BuildMI(BB, DL, TII->get(Opc2)).addReg(MI->getOperand(3).getReg())
680 BuildMI(BB, DL, TII->get(Opc1)).addMBB(sinkMBB)
[all...] |
| MipsSEFrameLowering.cpp | 183 DebugLoc DL = I->getDebugLoc();
187 BuildMI(MBB, I, DL, Desc, Lo).addReg(VR0, RegState::Kill);
189 BuildMI(MBB, I, DL, Desc, Hi).addReg(VR1, RegState::Kill);
212 DebugLoc DL = I->getDebugLoc();
214 BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);
216 BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill);
250 DebugLoc DL = I->getDebugLoc();
252 BuildMI(MBB, I, DL, TII.get(MFLoOpc), VR0).addReg(Src);
253 BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), DstLo)
255 BuildMI(MBB, I, DL, TII.get(MFHiOpc), VR1).addReg(Src, SrcKill)
286 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); local
404 DebugLoc dl = MBBI->getDebugLoc(); local
[all...] |
| MipsSEInstrInfo.cpp | 83 MachineBasicBlock::iterator I, DebugLoc DL,
110 BuildMI(MBB, I, DL, get(Mips::RDDSP), DestReg).addImm(1 << 4)
131 BuildMI(MBB, I, DL, get(Mips::WRDSP))
170 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
187 DebugLoc DL;
188 if (I != MBB.end()) DL = I->getDebugLoc();
221 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))
229 DebugLoc DL;
230 if (I != MBB.end()) DL = I->getDebugLoc();
262 BuildMI(MBB, I, DL, get(Opc), DestReg).addFrameIndex(FI).addImm(Offset
518 DebugLoc dl = I->getDebugLoc(); local
548 DebugLoc dl = I->getDebugLoc(); local
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 284 DebugLoc dl = MI.getDebugLoc(); local
308 BuildMI(MBB, II, dl, TII.get(PPC::ADDI), Reg)
312 BuildMI(MBB, II, dl, TII.get(PPC::LD), Reg)
316 BuildMI(MBB, II, dl, TII.get(PPC::LWZ), Reg)
333 BuildMI(MBB, II, dl, TII.get(PPC::LI8), NegSizeReg)
338 BuildMI(MBB, II, dl, TII.get(PPC::AND8), NegSizeReg)
344 BuildMI(MBB, II, dl, TII.get(PPC::STDUX), PPC::X1)
348 BuildMI(MBB, II, dl, TII.get(PPC::ADDI8), MI.getOperand(0).getReg())
358 BuildMI(MBB, II, dl, TII.get(PPC::LI), NegSizeReg)
363 BuildMI(MBB, II, dl, TII.get(PPC::AND), NegSizeReg
398 DebugLoc dl = MI.getDebugLoc(); local
442 DebugLoc dl = MI.getDebugLoc(); local
515 DebugLoc dl = MI.getDebugLoc(); local
558 DebugLoc dl = MI.getDebugLoc(); local
605 DebugLoc dl = MI.getDebugLoc(); local
630 DebugLoc dl = MI.getDebugLoc(); local
712 DebugLoc dl = MI.getDebugLoc(); local
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86MCInstLower.cpp | 75 const DataLayout *DL = TM.getDataLayout();
97 Name += DL->getPrivateGlobalPrefix();
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreFrameLowering.cpp | 62 MachineBasicBlock::iterator MBBI, DebugLoc dl,
67 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
72 MachineBasicBlock::iterator MBBI, DebugLoc dl,
77 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
82 MachineBasicBlock::iterator MBBI, DebugLoc dl,
87 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
98 MachineBasicBlock::iterator MBBI, DebugLoc dl,
107 BuildMI(MBB, MBBI, dl, TII.get(Opcode)).addImm(OpImm);
110 EmitDefCfaOffset(MBB, MBBI, dl, TII, MMI, Adjusted*4);
122 MachineBasicBlock::iterator MBBI, DebugLoc dl,
233 DebugLoc dl; local
345 DebugLoc dl = MBBI->getDebugLoc(); local
[all...] |
| /external/llvm/lib/Transforms/Instrumentation/ |
| ThreadSanitizer.cpp | 76 ThreadSanitizer() : FunctionPass(ID), DL(nullptr) {}
92 const DataLayout *DL;
221 DL = &DLP->getDataLayout();
225 IntptrTy = IRB.getIntPtrTy(DL);
314 if (!DL) return false;
556 uint32_t TypeSize = DL->getTypeStoreSizeInBits(OrigTy);
|
| /external/llvm/lib/Transforms/Scalar/ |
| DeadStoreElimination.cpp | 197 const DataLayout *DL = AA.getDataLayout();
207 if (Loc.Size == AliasAnalysis::UnknownSize && DL == nullptr)
221 if (!DL) return AliasAnalysis::Location();
349 const DataLayout *DL = AA.getDataLayout();
363 if (DL == nullptr && Later.Ptr->getType() == Earlier.Ptr->getType())
377 Earlier.Size == AliasAnalysis::UnknownSize || DL == nullptr)
383 const Value *UO1 = GetUnderlyingObject(P1, DL),
384 *UO2 = GetUnderlyingObject(P2, DL);
402 const Value *BP1 = GetPointerBaseWithConstantOffset(P1, EarlierOff, DL);
403 const Value *BP2 = GetPointerBaseWithConstantOffset(P2, LaterOff, DL);
[all...] |
| EarlyCSE.cpp | 266 const DataLayout *DL;
436 if (Value *V = SimplifyInstruction(Inst, DL, TLI, DT)) {
562 DL = DLP ? &DLP->getDataLayout() : nullptr;
|
| LICM.cpp | 112 const DataLayout *DL; // DataLayout for constant folding.
235 DL = DLP ? &DLP->getDataLayout() : nullptr;
408 if (Constant *C = ConstantFoldInstruction(&I, DL, TLI)) {
642 if (isSafeToSpeculativelyExecute(&Inst, DL))
691 DebugLoc DL;
716 AliasSetTracker &ast, LoopInfo &li, DebugLoc dl, int alignment,
720 LI(li), DL(dl), Alignment(alignment), TBAATag(TBAATag) {}
745 NewSI->setDebugLoc(DL);
[all...] |
