| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 205 bool XCoreRegisterInfo::needsFrameMoves(const MachineFunction &MF) {
206 return MF.getMMI().hasDebugInfo() ||
207 MF.getFunction()->needsUnwindTableEntry();
210 const MCPhysReg* XCoreRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
224 const TargetFrameLowering *TFI = MF->getTarget().getFrameLowering();
225 if (TFI->hasFP(*MF))
230 BitVector XCoreRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
232 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
238 if (TFI->hasFP(MF)) {
245 XCoreRegisterInfo::requiresRegisterScavenging(const MachineFunction &MF) const
[all...] |
| XCoreInstrInfo.cpp | 378 MachineFunction *MF = MBB.getParent();
379 const MachineFrameInfo &MFI = *MF->getFrameInfo();
381 MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIndex),
401 MachineFunction *MF = MBB.getParent();
402 const MachineFrameInfo &MFI = *MF->getFrameInfo();
404 MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIndex),
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| /external/llvm/lib/Transforms/IPO/ |
| LoopExtractor.cpp | 256 Function *MF = M.getFunction(F->getName());
257 assert(MF->getFunctionType() == F->getFunctionType() && "Wrong function?");
260 Function::iterator BBI = MF->begin();
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 316 MachineFunction &MF = DAG.getMachineFunction();
317 MachineRegisterInfo &MRI = MF.getRegInfo();
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| R600ISelLowering.cpp | 56 MachineFunction * MF = BB->getParent();
57 MachineRegisterInfo &MRI = MF->getRegInfo();
147 R600MachineFunctionInfo * MFI = MF->getInfo<R600MachineFunctionInfo>();
259 MachineFunction &MF = DAG.getMachineFunction();
260 MachineRegisterInfo &MRI = MF.getRegInfo();
|
| /external/llvm/include/llvm/CodeGen/ |
| AsmPrinter.h | 82 const MachineFunction *MF;
183 bool runOnMachineFunction(MachineFunction &MF) override {
184 SetupMachineFunction(MF);
196 void SetupMachineFunction(MachineFunction &MF);
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| LexicalScopes.h | 139 LexicalScopes() : MF(nullptr), CurrentFnLexicalScope(nullptr) {}
224 const MachineFunction *MF;
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| LiveIntervalAnalysis.h | 51 MachineFunction* MF;
|
| MachineTraceMetrics.h | 68 const MachineFunction *MF;
|
| /external/llvm/lib/CodeGen/ |
| InterferenceCache.h | 27 MachineFunction *MF;
51 /// MF - The current function.
52 MachineFunction *MF;
99 void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) {
102 MF = mf;
122 const MachineFunction *MF);
153 : TRI(nullptr), LIUArray(nullptr), MF(nullptr), PhysRegEntries(nullptr),
|
| LocalStackSlotAllocation.cpp | 82 bool runOnMachineFunction(MachineFunction &MF) override;
103 bool LocalStackSlotPass::runOnMachineFunction(MachineFunction &MF) {
104 MachineFrameInfo *MFI = MF.getFrameInfo();
105 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo();
110 if (!TRI->requiresVirtualBaseRegisters(MF) || LocalObjectCount == 0)
117 calculateFrameObjectOffsets(MF);
120 bool UsedBaseRegs = insertFrameReferenceRegisters(MF);
390 const MachineFunction *MF = MI->getParent()->getParent();
391 const TargetRegisterClass *RC = TRI->getPointerRegClass(*MF);
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| SplitKit.h | 44 const MachineFunction &MF;
|
| VirtRegMap.cpp | 55 bool VirtRegMap::runOnMachineFunction(MachineFunction &mf) {
56 MRI = &mf.getRegInfo();
57 TII = mf.getTarget().getInstrInfo();
58 TRI = mf.getTarget().getRegisterInfo();
59 MF = &mf;
70 unsigned NumRegs = MF->getRegInfo().getNumVirtRegs();
77 int SS = MF->getFrameInfo()->CreateSpillStackObject(RC->getSize(),
105 const TargetRegisterClass* RC = MF->getRegInfo().getRegClass(virtReg);
114 (SS >= MF->getFrameInfo()->getObjectIndexBegin())) &
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64BranchRelaxation.cpp | 79 MachineFunction *MF;
97 bool runOnMachineFunction(MachineFunction &MF) override;
109 unsigned PrevNum = MF->begin()->getNumber();
110 for (MachineBasicBlock &MBB : *MF) {
122 for (auto &MBB : *MF) {
150 BlockInfo.resize(MF->getNumBlockIDs());
156 for (MachineBasicBlock &MBB : *MF)
160 adjustBlockOffsets(*MF->begin());
193 for (auto &MBB : make_range(MachineFunction::iterator(Start), MF->end())) {
217 MF->CreateMachineBasicBlock(OrigBB->getBasicBlock())
[all...] |
| AArch64LoadStoreOptimizer.cpp | 644 const MachineFunction &MF = *MemMI->getParent()->getParent();
649 TII->getRegClass(MemMI->getDesc(), 0, TRI, MF)->getSize();
699 const MachineFunction &MF = *MemMI->getParent()->getParent();
704 unsigned RegSize = TII->getRegClass(MemMI->getDesc(), 0, TRI, MF)->getSize();
[all...] |
| /external/llvm/lib/Target/ARM/ |
| MLxExpansionPass.cpp | 289 const MachineFunction &MF = *MI->getParent()->getParent();
291 TII->getRegClass(MCID1, 0, TRI, MF));
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| Thumb1FrameLowering.cpp | 27 bool Thumb1FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const{
28 const MachineFrameInfo *FFI = MF.getFrameInfo();
37 return !MF.getFrameInfo()->hasVarSizedObjects();
52 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
55 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
57 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
58 if (!hasReservedCallFrame(MF)) {
85 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
86 MachineBasicBlock &MBB = MF.front();
88 MachineFrameInfo *MFI = MF.getFrameInfo()
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 46 void HexagonFrameLowering::determineFrameLayout(MachineFunction &MF) const {
47 MachineFrameInfo *MFI = MF.getFrameInfo();
53 unsigned TargetAlign = MF.getTarget().getFrameLowering()->getStackAlignment();
76 void HexagonFrameLowering::emitPrologue(MachineFunction &MF) const {
77 MachineBasicBlock &MBB = MF.front();
78 MachineFrameInfo *MFI = MF.getFrameInfo();
81 static_cast<const HexagonRegisterInfo *>(MF.getTarget().getRegisterInfo());
83 determineFrameLayout(MF);
96 MF.getInfo<HexagonMachineFunctionInfo>();
114 if (hasFP(MF)) {
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.cpp | 201 MachineFunction &MF = *MBB.getParent();
202 MachineFrameInfo *MFI = MF.getFrameInfo();
203 const BitVector Reserved = RI.getReservedRegs(MF);
231 MachineFunction *MF = MBB.getParent();
232 MachineFrameInfo *MFI = MF->getFrameInfo();
233 const BitVector Reserved = RI.getReservedRegs(*MF);
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| MipsLongBranch.cpp | 86 MachineFunction *MF;
148 MF->CreateMachineBasicBlock(MBB->getBasicBlock());
156 MF->insert(std::next(MachineFunction::iterator(MBB)), NewMBB);
165 for (MachineFunction::iterator I = MF->begin(), E = MF->end(); I != E;)
168 MF->RenumberBlocks();
170 MBBInfos.resize(MF->size());
175 MachineBasicBlock *MBB = MF->getBlockNumbered(I);
254 MachineBasicBlock *LongBrMBB = MF->CreateMachineBasicBlock(BB);
259 MF->insert(FallThroughMBB, LongBrMBB)
[all...] |
| MipsOptimizePICCall.cpp | 118 static MVT::SimpleValueType getRegTy(unsigned Reg, MachineFunction &MF) {
119 const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(Reg);
132 MachineFunction &MF = *MBB->getParent();
133 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
135 unsigned DstReg = getRegTy(SrcReg, MF) == MVT::i32 ? Mips::T9 : Mips::T9_64;
146 MachineFunction &MF = *MI.getParent()->getParent();
147 MVT::SimpleValueType Ty = getRegTy(MI.getOperand(0).getReg(), MF);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 358 MachineFunction *MF = MBB.getParent();
359 const MachineFrameInfo &MFI = *MF->getFrameInfo();
361 MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
396 MachineFunction *MF = MBB.getParent();
397 const MachineFrameInfo &MFI = *MF->getFrameInfo();
399 MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
425 unsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const
427 SparcMachineFunctionInfo *SparcFI = MF->getInfo<SparcMachineFunctionInfo>();
433 MachineBasicBlock &FirstMBB = MF->front();
435 MachineRegisterInfo &RegInfo = MF->getRegInfo()
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZLongBranch.cpp | 158 MachineFunction *MF;
262 MF->RenumberBlocks();
263 unsigned NumBlocks = MF->size();
271 BlockPosition Position(MF->getAlignment());
273 MachineBasicBlock *MBB = MF->getBlockNumbered(I);
335 BlockPosition Position(MF->getAlignment());
436 BlockPosition Position(MF->getAlignment());
452 MF = &F;
|
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 41 bool processBasicBlock(MachineFunction &MF, MachineFunction::iterator MFI);
88 bool runOnMachineFunction(MachineFunction &MF) override;
91 MachineFunction *MF;
108 NewMI = BuildMI(*MF, MI->getDebugLoc(),
153 MF = &Func;
309 NewMI = BuildMI(*MF, MI->getDebugLoc(), TII->get(addrr_opcode))
319 NewMI = BuildMI(*MF, MI->getDebugLoc(), TII->get(addri_opcode))
332 bool FixupLEAPass::processBasicBlock(MachineFunction &MF,
|
| X86RegisterInfo.cpp | 85 X86RegisterInfo::trackLivenessAfterRegAlloc(const MachineFunction &MF) const {
159 X86RegisterInfo::getPointerRegClass(const MachineFunction &MF,
177 const Function *F = MF.getFunction();
198 MachineFunction &MF) const {
199 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
201 unsigned FPDiff = TFI->hasFP(MF) ? 1 : 0;
217 X86RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
221 assert(MF && "MachineFunction required");
222 switch (MF->getFunction()->getCallingConv()) {
257 bool CallsEHReturn = MF->getMMI().callsEHReturn()
[all...] |
