| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 91 DAG->TM.getSubtarget<PPCSubtarget>().getDarwinDirective();
[all...] |
| PPCISelLowering.cpp | 63 PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
64 : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))),
65 Subtarget(*TM.getSubtargetImpl()) {
179 !(TM.Options.UnsafeFPMath &&
184 !(TM.Options.UnsafeFPMath &&
509 if (TM.Options.UnsafeFPMath || Subtarget.hasVSX()) {
660 if (TM.Options.UnsafeFPMath) {
[all...] |
| /external/strace/ |
| syscall.c | 98 #define TM TRACE_MEMORY
127 #undef TM
[all...] |
| /external/chromium_org/third_party/libaddressinput/src/java/src/com/android/i18n/addressinput/ |
| RegionDataConstants.java | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILCFGStructurizer.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| CodeGenPrepare.cpp | 90 const TargetMachine *TM;
120 explicit CodeGenPrepare(const TargetMachine *TM = nullptr)
121 : FunctionPass(ID), TM(TM), TLI(nullptr) {
157 FunctionPass *llvm::createCodeGenPreparePass(const TargetMachine *TM) {
158 return new CodeGenPrepare(TM);
171 if (TM) TLI = TM->getTargetLowering();
[all...] |
| MachineScheduler.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 83 const TargetMachine &TM;
97 TM(funcInfo.MF->getTarget()),
98 TII(*TM.getInstrInfo()),
99 TLI(*TM.getTargetLowering()) {
100 Subtarget = &TM.getSubtarget<ARMSubtarget>();
192 const TargetLowering *getTargetLowering() { return TM.getTargetLowering(); }
579 Reloc::Model RelocM = TM.getRelocationModel();
[all...] |
| ARMISelLowering.cpp | 73 const TargetMachine &TM, SmallVectorImpl<CCValAssign> &locs,
75 : CCState(CC, isVarArg, MF, TM, locs, C) {
166 ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
167 : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {
168 Subtarget = &TM.getSubtarget<ARMSubtarget>();
169 RegInfo = TM.getRegisterInfo();
170 Itins = TM.getInstrItineraryData();
177 Subtarget->hasARMOps() && !TM.Options.UseSoftFloat) {
394 if (!TM.Options.UseSoftFloat && Subtarget->hasVFP2() &
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| X86ISelLowering.cpp | 214 X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
215 : TargetLowering(TM, createTLOF(Triple(TM.getTargetTriple()))) {
216 Subtarget = &TM.getSubtarget<X86Subtarget>();
225 const TargetMachine &TM = getTargetMachine();
230 if (!FirstTimeThrough && TO == TM.Options) return;
238 TO = TM.Options;
258 static_cast<const X86RegisterInfo*>(TM.getRegisterInfo());
262 if (Subtarget->hasSlowDivide() && TM.getOptLevel() >= CodeGenOpt::Default) {
336 } else if (!TM.Options.UseSoftFloat)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILCFGStructurizer.cpp | [all...] |
