| /external/llvm/test/Transforms/LoopUnroll/X86/ |
| partial.ll | 19 %4 = fadd <2 x double> %wide.load, <double 1.000000e+00, double 1.000000e+00>
20 %5 = fadd <2 x double> %wide.load8, <double 1.000000e+00, double 1.000000e+00>
51 %v4 = fadd <2 x double> %wide.load, <double 1.000000e+00, double 1.000000e+00>
65 ; CHECK: fadd
67 ; CHECK: fadd
71 ; CHECK-NOUNRL: fadd
73 ; CHECK-NOUNRL-NOT: fadd
|
| /external/llvm/test/Transforms/BBVectorize/ |
| simple-int.ll | 27 %Z1 = fadd double %Y1, %B1
28 %Z2 = fadd double %Y2, %B2
40 ; CHECK: %Z1 = fadd <2 x double> %Y1, %X1.v.i1.2
53 %Z1 = fadd double %Y1, %B1
54 %Z2 = fadd double %Y2, %B2
66 ; CHECK: %Z1 = fadd <2 x double> %Y1, %X1.v.i1.2
79 %Z1 = fadd double %Y1, %B1
80 %Z2 = fadd double %Y2, %B2
90 ; CHECK: %Z1 = fadd <2 x double> %Y1, %X1.v.i1.2
104 %Z1 = fadd double %Y1, %B
[all...] |
| /external/llvm/test/Analysis/CostModel/X86/ |
| reduction.ll | 8 %bin.rdx = fadd <4 x float> %rdx, %rdx.shuf
10 %bin.rdx8 = fadd <4 x float> %bin.rdx, %rdx.shuf7
47 %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
52 %bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
58 %r2 = fadd float %r, %f1
67 %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.1, %rdx.shuf.0.0
72 %bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1
78 %r2 = fadd float %r, %f1
87 %bin.rdx.0 = fadd <4 x float> %rdx.shuf.0.0, %rdx.shuf.0.1
90 %bin.rdx.1 = fadd <4 x float> %bin.rdx.0, %rdx.shuf.1.
[all...] |
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| crash_smallpt.ll | 40 %add.i276.us = fadd double 0.000000e+00, undef
41 %add.i264.us = fadd double %add.i276.us, 0.000000e+00
42 %add4.i267.us = fadd double undef, 0xBFA5CC2D1960285F
45 %add.i243.us = fadd double %mul.i254.us, 5.000000e+01
46 %add4.i246.us = fadd double %mul2.i256.us, 5.200000e+01
86 %add.i716 = fadd double undef, %mul.i727
87 %add4.i719 = fadd double undef, %mul2.i729
88 %add.i695 = fadd double undef, %add.i716
89 %add4.i698 = fadd double undef, %add4.i719
|
| compare-reduce.ll | 12 ;CHECK: fadd <2 x double>
28 %add = fadd double %mul2, 5.000000e+00
34 %add10 = fadd double %mul9, 9.000000e+00
|
| in-tree-user.ll | 24 %add = fadd double %mul2, 5.000000e+00
25 %BadValue = fadd double %add, %add ; <------------------ In tree user.
31 %add10 = fadd double %mul9, 9.000000e+00
|
| /external/llvm/test/CodeGen/ARM/ |
| a15-SD-dep.ll | 10 %i2 = fadd <2 x float> %i1, %i1
20 %i2 = fadd <4 x float> %i1, %i1
30 %i2 = fadd <2 x float> %i1, %i1
44 %i2 = fadd <2 x float> %i1, %i1
56 %i2 = fadd <4 x float> %i1, %i1
|
| 2009-11-13-ScavengerAssert.ll | 30 %14 = fadd float %12, %13 ; <float> [#uses=1]
32 %16 = fadd float %14, %15 ; <float> [#uses=1]
|
| 2009-11-13-ScavengerAssert2.ll | 52 %27 = fadd float %26, undef ; <float> [#uses=1]
53 %28 = fadd float %27, undef ; <float> [#uses=1]
71 %46 = fadd float %44, %45 ; <float> [#uses=1]
73 %48 = fadd float %46, %47 ; <float> [#uses=2]
88 %63 = fadd float %61, %62 ; <float> [#uses=1]
90 %65 = fadd float %63, %64 ; <float> [#uses=2]
102 %77 = fadd float undef, %76 ; <float> [#uses=1]
104 %79 = fadd float %77, %78 ; <float> [#uses=1]
|
| /external/llvm/test/CodeGen/SystemZ/ |
| fp-move-02.ll | 123 %biased0 = fadd double %double0, %extra
126 %biased1 = fadd double %double1, %extra
129 %biased2 = fadd double %double2, %extra
132 %biased3 = fadd double %double3, %extra
135 %biased4 = fadd double %double4, %extra
138 %biased5 = fadd double %double5, %extra
141 %biased6 = fadd double %double6, %extra
144 %biased7 = fadd double %double7, %extra
147 %biased8 = fadd double %double8, %extra
150 %biased9 = fadd double %double9, %extr
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| sse-intel-ocl.ll | 37 %x = fadd <16 x float> %a, %b
40 %3 = fadd <16 x float> %2, %1
64 %x = fadd <16 x float> %a, %b
67 %3 = fadd <16 x float> %1, %b
68 %4 = fadd <16 x float> %2, %3
|
| avx-brcond.ll | 18 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
42 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
66 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
90 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
114 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
138 %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 >
|
| /external/llvm/test/Transforms/InstCombine/ |
| add4.ll | 30 %sum = fadd fast float %s1, %s2
43 %s1 = fadd fast float %p2, %p1
56 %s1 = fadd fast float %p1, %p2
86 %s1 = fadd fast <4 x float> %p2, %p1
98 %s1 = fadd fast <4 x float> %p1, %p2
|
| fmul.ll | 118 %a = fadd fast float %x, 1.0
119 %b = fadd fast float %y, 2.0
120 %c = fadd fast float %a, %b
123 ; CHECK-NOT: fadd float
124 ; CHECK: fadd fast float
|
| 2012-06-06-LoadOfPHIs.ll | 71 ; CHECK: %tmp29 = fadd double %tmp27, %tmp28
74 %tmp29 = fadd double %tmp27, %tmp28
93 %tmp39 = fadd double %tmp32, %tmp31
132 %tmp65 = fadd double 2.000000e+00, %tmp64
144 %tmp74 = fadd double 4.000000e+00, %tmp73
156 %tmp80 = fadd double %tmp77, 1.000000e+00
|
| /external/llvm/test/Transforms/LoopReroll/ |
| reduction.ll | 59 %add = fadd float %0, %r.029
63 %add4 = fadd float %add, %2
67 %add8 = fadd float %add4, %4
71 %add12 = fadd float %add8, %6
84 ; CHECK: %add = fadd float %0, %r.029
|
| /external/llvm/test/CodeGen/R600/ |
| big_alu.ll | 198 %179 = fadd float %178, %28
203 %184 = fadd float %183, 0x3FAEB851E0000000
205 %186 = fadd float %185, %184
207 %188 = fadd float %187, %186
209 %190 = fadd float %189, %188
211 %192 = fadd float %191, %190
213 %194 = fadd float %193, %192
215 %196 = fadd float %195, %194
217 %198 = fadd float %197, %196
222 %203 = fadd float %202, 0x3FF4CCCCC000000
[all...] |
| r600-export-fix.ll | 34 %19 = fadd float %18, %6
38 %23 = fadd float %22, %9
42 %27 = fadd float %26, %12
46 %31 = fadd float %30, %15
50 %35 = fadd float %34, %19
54 %39 = fadd float %38, %23
58 %43 = fadd float %42, %27
62 %47 = fadd float %46, %31
66 %51 = fadd float %50, %35
70 %55 = fadd float %54, %3
[all...] |
| /external/llvm/test/Transforms/BBVectorize/X86/ |
| wr-aliases.ll | 64 %add.i = fadd double %v4, %v5
68 %add3.i = fadd double %v4, %v6
75 %add7.i = fadd double %v7, %v8
82 %add15.i = fadd double %mul.i, %v10
87 %add19.i = fadd double %mul.i, %v11
91 %add24.i = fadd double %v12, %mul20.i
100 %add28.i = fadd double %v13, %v14
104 %add30.i = fadd double %v13, %v15
111 %add34.i = fadd double %v16, %v17
118 %add42.i = fadd double %div.i, %v1
[all...] |
| /external/valgrind/main/none/tests/ppc32/ |
| jm-fp.stdout.exp | 239 fadd 0010000000000001, 0010000000000001 => 0020000000000001
240 fadd 0010000000000001, 80100094e0000359 => 80000094e0000358
241 fadd 0010000000000001, 7ff0000000000000 => 7ff0000000000000
242 fadd 0010000000000001, fff8000000000000 => fff8000000000000
243 fadd 3fe00094e0000359, 0010000000000001 => 3fe00094e0000359
244 fadd 3fe00094e0000359, 80100094e0000359 => 3fe00094e0000359
245 fadd 3fe00094e0000359, 7ff0000000000000 => 7ff0000000000000
246 fadd 3fe00094e0000359, fff8000000000000 => fff8000000000000
247 fadd bfe0000000000001, 0010000000000001 => bfe0000000000001
248 fadd bfe0000000000001, 80100094e0000359 => bfe000000000000
[all...] |
| /external/valgrind/main/none/tests/ppc64/ |
| jm-fp.stdout.exp | 239 fadd 0010000000000001, 0010000000000001 => 0020000000000001
240 fadd 0010000000000001, 80100094e0000359 => 80000094e0000358
241 fadd 0010000000000001, 7ff0000000000000 => 7ff0000000000000
242 fadd 0010000000000001, fff8000000000000 => fff8000000000000
243 fadd 3fe00094e0000359, 0010000000000001 => 3fe00094e0000359
244 fadd 3fe00094e0000359, 80100094e0000359 => 3fe00094e0000359
245 fadd 3fe00094e0000359, 7ff0000000000000 => 7ff0000000000000
246 fadd 3fe00094e0000359, fff8000000000000 => fff8000000000000
247 fadd bfe0000000000001, 0010000000000001 => bfe0000000000001
248 fadd bfe0000000000001, 80100094e0000359 => bfe000000000000
[all...] |
| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
| armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S | 141 fadd dY0,dX0,dX1 // [b+d | a+c]
154 fadd dX1,dY0,dY1
199 fadd dT3,dX0i,dX1i // b+d
200 fadd dT0,dX0r,dX1r // a+c
231 fadd dY1r,dT0,dX1i // F(N/2 -1)
238 fadd dY0r,dT0,dX0i // F(1)
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-fcopysign.ll | 30 %tmp1 = fadd float %b, %c
45 %3 = fadd float %1, %2
|
| /external/llvm/test/CodeGen/Mips/ |
| nomips16.ll | 11 %add = fadd double %conv, 1.500000e+00
25 %add = fadd double %conv, 3.900000e+00
|
| /external/llvm/test/CodeGen/NVPTX/ |
| vector-args.ll | 11 %t4 = fadd float %t2, %t3
23 %t4 = fadd float %t2, %t3
|
