| /external/chromium_org/third_party/openmax_dl/dl/sp/src/arm/arm64/ |
| armSP_FFT_CToC_FC32_Radix2_ls_s.S | 126 fadd dYr1,dXr0,qT0
127 fadd dYi1,dXi0,qT1
|
| armSP_FFT_CToC_FC32_Radix2_s.S | 154 fadd dY2,dX0,qT0
155 fadd dY3,dX1,qT1
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| trip-count5.ll | 26 %tmp10 = fadd float %tmp8, %distERBhi.036 ; <float> [#uses=3]
31 %tmp19 = fadd float %tmp17, %peakCount.034 ; <float> [#uses=2]
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-abi.ll | 99 ; CHECK: fadd s0, [[REG_2]], s0
101 %add = fadd float %conv, %f1
103 %add2 = fadd double %conv1, %d7
104 %add3 = fadd double %add2, %d8
115 ; CHECK: fadd s0, [[REG_2]], s0
118 %add = fadd float %conv, %d1
121 %add3 = fadd double %conv2, %conv1
123 %add5 = fadd double %conv4, %add3
|
| /external/llvm/test/CodeGen/ARM/ |
| fp_convert.ll | 26 %0 = fadd float %a, %b
38 %0 = fadd float %a, %b
|
| fparith.ll | 7 %tmp = fadd float %a, %b ; <float> [#uses=1]
15 %tmp = fadd double %a, %b ; <double> [#uses=1]
|
| neon_spill.ll | 37 %8 = fadd float undef, -1.000000e+05
41 %11 = fadd float %10, -1.000000e+05
|
| /external/llvm/test/CodeGen/Mips/ |
| fcopysign-f32-f64.ll | 25 %add = fadd float %d, 1.000000e+00
49 %add = fadd double %d, 1.000000e+00
|
| return-vector.ll | 54 %add1 = fadd float %v0, %v1
55 %add2 = fadd float %v2, %v3
56 %add3 = fadd float %add1, %add2
76 %add1 = fadd double %v0, %v1
77 %add2 = fadd double %v2, %v3
78 %add3 = fadd double %add1, %add2
126 %add1 = fadd float %v0, %v1
141 %add1 = fadd double %v0, %v1
|
| /external/llvm/test/CodeGen/NVPTX/ |
| arithmetic-fp-sm20.ll | 14 %ret = fadd double %a, %b
47 %ret = fadd float %a, %b
|
| /external/llvm/test/CodeGen/PowerPC/ |
| unal-altivec.ll | 18 %4 = fadd <4 x float> %wide.load, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
19 %5 = fadd <4 x float> %wide.load8, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
|
| /external/llvm/test/CodeGen/R600/ |
| llvm.AMDGPU.cube.ll | 34 %23 = fadd float %22, 1.500000e+00
36 %25 = fadd float %24, 1.500000e+00
|
| r600-infinite-loop-bug-while-reorganizing-vector.ll | 22 %18 = fadd float %17, 1.500000e+00
24 %20 = fadd float %19, 1.500000e+00
|
| /external/llvm/test/CodeGen/Thumb2/ |
| 2010-06-14-NEONCoalescer.ll | 30 %5 = fadd <2 x double> %3, %3 ; <<2 x double>> [#uses=2]
31 %6 = fadd <2 x double> %4, %4 ; <<2 x double>> [#uses=2]
|
| /external/llvm/test/CodeGen/X86/ |
| avx-logic.ll | 11 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
22 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
53 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
64 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
95 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
106 %2 = fadd <4 x double> %1, <double 0x0, double 0x0, double 0x0, double 0x0>
138 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
152 %3 = fadd <4 x double> %2, <double 0x0, double 0x0, double 0x0, double 0x0>
|
| avx512-cmp.ll | 13 %c1 = fadd double %a, %b
27 %c1 = fadd float %a, %b
|
| fast-isel-store.ll | 53 %foo = fadd <2 x double> %value, %value2 ; to force dobule type on store
61 %foo = fadd <2 x double> %value, %value2 ; to force dobule type on store
|
| fma_patterns_wide.ll | 15 %res = fadd <16 x float> %x, %a2
68 %res = fadd <8 x double> %x, %a2
|
| /external/llvm/test/Transforms/InstCombine/ |
| fold-fops-into-selects.ll | 15 %op = fadd float 2.000000e+00, %cf
18 ; CHECK: [[OP:%.*]] = fadd float %B, 2.000000e+00
|
| /external/llvm/test/Transforms/LoopSimplify/ |
| merge-exits.ll | 21 %t4 = fadd float %t3, %distERBhi.0 ; <float> [#uses=1]
26 %t9 = fadd float %t8, %peakCount.0 ; <float> [#uses=1]
|
| /external/llvm/test/Transforms/LoopVectorize/ |
| cpp-new-array.ll | 9 ;CHECK: fadd <4 x float>
32 %add = fadd float %3, %4
|
| safegep.ll | 24 %D.1399_17 = fadd float %D.1398_15, %K
50 %D.1399_17 = fadd float %D.1398_15, %K
|
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| reduction.ll | 33 %add5 = fadd double %mul1, %mul4
34 %add6 = fadd double %sum.014, %add5
|
| /dalvik/dx/tests/102-verify-nonwide-math/ |
| expected.txt | 8 fadd: expected failure occurred
|
| /external/compiler-rt/lib/builtins/ |
| addsf3.c | 18 ARM_EABI_FNALIAS(fadd, addsf3)
|
