| /external/llvm/docs/tutorial/ |
| LangImpl3.rst | 481 %addtmp = fadd double %multmp, %multmp2
483 %addtmp4 = fadd double %addtmp, %multmp3
498 %addtmp = fadd double %calltmp, %calltmp1
532 %addtmp = fadd double 4.000000e+00, 5.000000e+00
541 %addtmp = fadd double %multmp, %multmp2
543 %addtmp4 = fadd double %addtmp, %multmp3
551 %addtmp = fadd double %calltmp, %calltmp1
|
| OCamlLangImpl3.rst | 410 %addtmp = fadd double 4.000000e+00, 5.000000e+00
431 %addtmp = fadd double %multmp, %multmp2
433 %addtmp4 = fadd double %addtmp, %multmp3
448 %addtmp = fadd double %calltmp, %calltmp1
479 %addtmp = fadd double 4.000000e+00, 5.000000e+00
488 %addtmp = fadd double %multmp, %multmp2
490 %addtmp4 = fadd double %addtmp, %multmp3
498 %addtmp = fadd double %calltmp, %calltmp1
[all...] |
| OCamlLangImpl4.rst | 35 %addtmp = fadd double 1.000000e+00, 2.000000e+00
36 %addtmp1 = fadd double %addtmp, %x
66 %addtmp = fadd double 3.000000e+00, %x
87 %addtmp = fadd double 3.000000e+00, %x
88 %addtmp1 = fadd double %x, 3.000000e+00
210 %addtmp = fadd double %x, 3.000000e+00
320 %addtmp = fadd double %multmp, %x
368 %addtmp = fadd double %multmp, %multmp4
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAddSub.cpp | 10 // This file implements the visit functions for add, fadd, sub, and fsub.
154 /// FAddCombine is the class for optimizing an unsafe fadd/fsub along
160 Value *simplify(Instruction *FAdd);
359 if (Opcode == Instruction::FAdd || Opcode == Instruction::FSub) {
441 assert((I->getOpcode() == Instruction::FAdd ||
494 Value *NewAddSub = (I->getOpcode() == Instruction::FAdd) ?
524 assert((I->getOpcode() == Instruction::FAdd ||
708 // Note that at most three instructions are involved in Fadd-InstCombine: the
718 // Iterate the addends, creating fadd/fsub using adjacent two addends.
839 // <2/-2, V> "fadd V, V" coefficient is -
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrFPU.td | 467 def FADD_S : MMRel, ADDS_FT<"add.s", FGR32Opnd, II_ADD_S, 1, fadd>,
469 defm FADD : ADDS_M<"add.d", II_ADD_D, 1, fadd>, ADDS_FM<0x00, 17>;
480 def MADD_S : MMRel, MADDS_FT<"madd.s", FGR32Opnd, II_MADD_S, fadd>,
486 def NMADD_S : MMRel, NMADDS_FT<"nmadd.s", FGR32Opnd, II_NMADD_S, fadd>,
492 def MADD_D32 : MMRel, MADDS_FT<"madd.d", AFGR64Opnd, II_MADD_D, fadd>,
498 def NMADD_D32 : MMRel, NMADDS_FT<"nmadd.d", AFGR64Opnd, II_NMADD_D, fadd>,
505 def MADD_D64 : MADDS_FT<"madd.d", FGR64Opnd, II_MADD_D, fadd>,
513 def NMADD_D64 : NMADDS_FT<"nmadd.d", FGR64Opnd, II_NMADD_D, fadd>,
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2011-12-06-SpillAndRestoreCR.ll | 194 %add = fadd float %max.3.15, %conv
196 %add19 = fadd float %add, %conv18
208 %add29 = fadd float %add, 1.000000e+00
209 %add31 = fadd float %add29, %conv18
210 %add32 = fadd float %add31, 1.000000e+00
|
| /external/llvm/test/CodeGen/X86/ |
| avx512-arith.ll | 8 %add.i = fadd <8 x double> %x, %y
17 %add.i = fadd <8 x double> %y, <double 4.500000e+00, double 3.400000e+00, double 2.300000e+00, double 1.200000e+00, double 4.500000e+00, double 3.800000e+00, double 2.300000e+00, double 1.200000e+00>
26 %add.i = fadd <16 x float> %x, %y
35 %add.i = fadd <16 x float> %y, <float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000, float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000, float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 4.500000e+00, float 4.500000e+00, float 0x400B333340000000, float 0x4002666660000000, float 0x3FF3333340000000>
362 %b = fadd <16 x float> %a, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
|
| fold-pcmpeqd-0.ll | 51 %add167.i87 = fadd <4 x float> %mul166.i86, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 > ; <<4 x float>> [#uses=1]
53 %add172.i89 = fadd <4 x float> %mul171.i88, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 > ; <<4 x float>> [#uses=1]
69 %add172.i = fadd <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 > ; <<4 x float>> [#uses=1]
|
| inline-asm-fpstack.ll | 44 ; Same as test3/4, but using value from fadd.
45 ; The fadd can be done in xmm or x87 regs - we don't test that.
51 %Y = fadd double %X, 123.0
|
| 2007-04-24-VectorCrash.ll | 39 fadd <4 x float> %29, zeroinitializer ; <<4 x float>>:30 [#uses=1]
59 fadd <4 x float> %49, zeroinitializer ; <<4 x float>>:50 [#uses=1]
|
| fold-pcmpeqd-2.ll | 42 %add167.i = fadd <4 x float> %mul166.i, < float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000, float 0x3FE62ACB60000000 > ; <<4 x float>> [#uses=1]
44 %add172.i = fadd <4 x float> %mul171.i, < float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000, float 0x3FF0000A40000000 > ; <<4 x float>> [#uses=1]
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 467 case ISD::FADD:
476 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
480 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
528 case ISD::FADD:
532 // fold (fneg (fadd A, B)) -> (fsub (fneg A), B)
540 // fold (fneg (fadd A, B)) -> (fsub (fneg B), A)
[all...] |
| /external/llvm/test/Transforms/SampleProfile/ |
| branch.ll | 55 %add = fadd double %s.015, 3.049000e+00, !dbg !36
57 %add4 = fadd double %add, %conv, !dbg !36
61 %add5 = fadd double %add4, %mul, !dbg !37
|
| /external/proguard/src/proguard/classfile/instruction/ |
| Instruction.java | 135 false, // fadd
344 2, // fadd
553 1, // fadd
|
| /prebuilts/misc/common/swig/include/2.0.11/chicken/ |
| typemaps.i | 36 double fadd(double *a, double *b) {
43 double fadd(double *INPUT, double *INPUT);
49 double fadd(double *a, double *b);
|
| /prebuilts/misc/common/swig/include/2.0.11/perl5/ |
| typemaps.i | 41 double fadd(double *a, double *b) {
48 double fadd(double *INPUT, double *INPUT);
54 double fadd(double *a, double *b);
|
| /prebuilts/misc/common/swig/include/2.0.11/ruby/ |
| typemaps.i | 54 double fadd(double *a, double *b) {
61 double fadd(double *INPUT, double *INPUT);
67 double fadd(double *a, double *b);
|
| /prebuilts/misc/common/swig/include/2.0.11/typemaps/ |
| inoutlist.swg | 59 double fadd(double *a, double *b) {
65 double fadd(double *INPUT, double *INPUT);
70 double fadd(double *a, double *b);
|
| /external/llvm/test/MC/PowerPC/ |
| ppc64-encoding-fp.s | 105 # CHECK-BE: fadd 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x2a]
106 # CHECK-LE: fadd 2, 3, 4 # encoding: [0x2a,0x20,0x43,0xfc]
107 fadd 2, 3, 4
108 # CHECK-BE: fadd. 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x2b]
109 # CHECK-LE: fadd. 2, 3, 4 # encoding: [0x2b,0x20,0x43,0xfc]
110 fadd. 2, 3, 4
|
| /external/javassist/src/main/javassist/bytecode/ |
| Opcode.java | 87 int FADD = 98;
342 -1, // fadd, 98
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-inline-asm.ll | 44 ; CHECK: fadd {{s[0-9]+}}, {{s[0-9]+}}, {{s[0-9]+}}
45 %0 = tail call float asm "fadd ${0:s}, ${0:s}, ${0:s}", "=w,0"(float %x) nounwind
|
| /external/llvm/test/CodeGen/ARM/ |
| debug-info-branch-folding.ll | 21 %add19 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
23 %add20 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39
|
| fast-isel-align.ll | 36 %add = fadd float %x, %y
53 %add = fadd double %a, %b
|
| vld3.ll | 70 %tmp4 = fadd <2 x float> %tmp2, %tmp3
159 %tmp4 = fadd <4 x float> %tmp2, %tmp3
|
| vld4.ll | 70 %tmp4 = fadd <2 x float> %tmp2, %tmp3
160 %tmp4 = fadd <4 x float> %tmp2, %tmp3
|
