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  /external/chromium_org/net/data/ftp/
dir-listing-vms-8 12 ITANIUM.DIR;1 1 12-JAN-2008 06:56 [ANONY,ANONYMOUS] (RWE,RE,RE,RE)
  /external/libcxxabi/src/
cxa_exception_storage.cpp 91 // to the Itanium ABI and is taken advantage of in several places in
  /external/lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABI/
ItaniumABILanguageRuntime.cpp 51 // For Itanium, if the type has a vtable pointer in the object, it will be at offset 0
290 // the Itanium ABI.
301 "Itanium ABI for the C++ language",
314 static ConstString g_name("itanium");
  /ndk/sources/cxx-stl/gabi++/include/
typeinfo 31 // Itanium C++ ABI at http://www.codesourcery.com/public/cxx-abi/abi.html.
cxxabi.h 35 // - Itanium C++ ABI [1]
41 // - Itanium C++ ABI: Exception Handling. [2]
  /ndk/sources/cxx-stl/gabi++/src/
dwarf_helper.h 37 // http://www.intel.com/design/itanium/downloads/245358.htm
helper_func_internal.h 86 // Make it easier to adapt to Itanium PR
  /ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/src/
cxa_exception_storage.cpp 91 // to the Itanium ABI and is taken advantage of in several places in
  /prebuilts/ndk/9/sources/cxx-stl/EH/gabi++/include/
typeinfo 31 // Itanium C++ ABI at http://www.codesourcery.com/public/cxx-abi/abi.html.
cxxabi.h 35 // - Itanium C++ ABI [1]
41 // - Itanium C++ ABI: Exception Handling. [2]
  /prebuilts/ndk/9/sources/cxx-stl/llvm-libc++/gabi++/include/
typeinfo 31 // Itanium C++ ABI at http://www.codesourcery.com/public/cxx-abi/abi.html.
cxxabi.h 35 // - Itanium C++ ABI [1]
41 // - Itanium C++ ABI: Exception Handling. [2]
  /external/clang/test/CodeGenCXX/
vtt-layout.cpp 24 // This is the sample from the C++ Itanium ABI, p2.6.2.
42 // This is the sample from the C++ Itanium ABI, p2.6.2, with the change suggested
  /external/clang/lib/AST/
VTableBuilder.cpp 619 // Itanium C++ ABI 2.5.2:
    [all...]
  /external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/
ghash-ia64.pl 16 # on Itanium 2, which is >90% better than Microsoft compiler generated
18 # byte in 5.7 cycles. On Itanium GHASH should run at ~8.5 cycles per
24 # "528B" variant on Itanium 2 for following reason. Because number of
32 # Itanium performance should remain the same as the "256B" version,
50 # Loop is scheduled for 6 ticks on Itanium 2 and 8 on Itanium, i.e.
142 add Hhi=1,Xi };; // pipeline flush on Itanium
  /external/openssl/crypto/modes/asm/
ghash-ia64.pl 16 # on Itanium 2, which is >90% better than Microsoft compiler generated
18 # byte in 5.7 cycles. On Itanium GHASH should run at ~8.5 cycles per
24 # "528B" variant on Itanium 2 for following reason. Because number of
32 # Itanium performance should remain the same as the "256B" version,
50 # Loop is scheduled for 6 ticks on Itanium 2 and 8 on Itanium, i.e.
142 add Hhi=1,Xi };; // pipeline flush on Itanium
  /external/libunwind/doc/
libunwind-ia64.tex 17 the Itanium Processor Family. This includes both little-endian Linux
59 please see the ``Itanium Software Conventions and Runtime Architecture
62 \URL{http://www.intel.com/design/itanium/downloads/245358.htm}
  /external/oprofile/events/ia64/itanium2/
unit_masks 1 # IA-64 Itanium 2 possible unit masks
3 # The information for the following entries for the Itanium 2
4 # came from Intel Itanium 2 Processor Reference Manual For
  /external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/
ia64-mont.pl 21 # "wider" IA-64, "wider" than Itanium 2 that is, which is not of
23 # reportedly based on Itanium 2 design;
38 # So far 'openssl speed rsa dsa' output on 900MHz Itanium 2 *with*
235 // This loop spins in 4*(n+7) ticks on Itanium 2 and should spin in
236 // 7*(n+7) ticks on Itanium (the one codenamed Merced). Factor of 7
239 // attempt was made to address this, because original Itanium is
491 // The loop is scheduled for 32*n ticks on Itanium 2. Actual attempt
495 // to platform-specific instruction-level profiler. On Itanium it
ia64.S 17 // different from Itanium to this module viewpoint. Most notably, is it
18 // "wider" than Itanium? Can you experience loop scalability as
23 // module Itanium2 remains effectively as "wide" as Itanium. Yet it's
28 // Itanium Itanium2
42 // Itanium would exhibit anti-scalability. So I've chosen to reschedule
128 // Oh! Benchmarks were performed on 733MHz Lion-class Itanium
164 // performance loss on Itanium for scalability.
317 // This loop spins in 2*(n+12) ticks. It's scheduled for data in Itanium
323 // IA-64, but would hurt Itanium for about same because of longer
423 // This loop spins in 3*(n+10) ticks on Itanium and in 2*(n+10) o
    [all...]
  /external/linux-tools-perf/perf-3.12.0/arch/ia64/lib/
memcpy.S 113 * copy loop. This performs relatively poorly on Itanium, but it doesn't
169 * On Itanium, the pipeline itself runs without stalls. However, br.ctop
  /external/ltrace/sysdeps/linux-gnu/
events.c 185 * N.B. This was observed on RHEL 5 Itanium, but I'm
314 actually seen this on an Itanium machine on RHEL 5, I don't
  /external/openssl/crypto/bn/asm/
ia64-mont.pl 21 # "wider" IA-64, "wider" than Itanium 2 that is, which is not of
23 # reportedly based on Itanium 2 design;
38 # So far 'openssl speed rsa dsa' output on 900MHz Itanium 2 *with*
235 // This loop spins in 4*(n+7) ticks on Itanium 2 and should spin in
236 // 7*(n+7) ticks on Itanium (the one codenamed Merced). Factor of 7
239 // attempt was made to address this, because original Itanium is
491 // The loop is scheduled for 32*n ticks on Itanium 2. Actual attempt
495 // to platform-specific instruction-level profiler. On Itanium it
  /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/test/
test_sysconfig.py 125 # windows XP, itanium
128 '[MSC v.1310 32 bit (Itanium)]')
  /prebuilts/python/linux-x86/2.7.5/lib/python2.7/test/
test_sysconfig.py 125 # windows XP, itanium
128 '[MSC v.1310 32 bit (Itanium)]')

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