| /external/valgrind/main/none/tests/mips32/ |
| fpu_branches.stdout.exp | 1 --- BC1F --- if fs != ft then out = fs else out = fs + ft
2 bc1f, c.eq.s out=0.000000, fs=0.000000, ft=-4578.500000
3 bc1f, c.eq.d out=0.000000, fs=0.000000, ft=-45786.500000
4 bc1f, c.eq.s out=912.500000, fs=456.250000, ft=456.250000
5 bc1f, c.eq.d out=912.500000, fs=456.250000, ft=456.250000
6 bc1f, c.eq.s out=3.000000, fs=3.000000, ft=34.031250
7 bc1f, c.eq.d out=3.000000, fs=3.000000, ft=34.031250
8 bc1f, c.eq.s out=-1.000000, fs=-1.000000, ft=4578.750000
9 bc1f, c.eq.d out=-1.000000, fs=-1.000000, ft=45786.750000
10 bc1f, c.eq.s out=1384.500000, fs=1384.500000, ft=175.00000
[all...] |
| fpu_branches.c | 136 "bc1f end"instruction"s"#RDval "\n\t" \
146 printf("%s, bc1f out=%f, fs=%f, ft=%f\n", \
158 "bc1f end"instruction"d"#RDval "\n\t" \
168 printf("%s, bc1f out=%f, fs=%f, ft=%f\n", \
176 printf("--- BC1F --- if fs != ft then " \
179 TESTINST1s("bc1f", i);
180 TESTINST1d("bc1f", i);
|
| /external/valgrind/main/none/tests/mips64/ |
| fpu_branches.stdout.exp | 1 --- BC1F --- if fs == ft then out = ft else out = fs + ft
2 bc1f, c.eq.s out=-4578.500000, fs=0.000000, ft=-4578.500000
3 bc1f, c.eq.d out=-45786.500000, fs=0.000000, ft=-45786.500000
4 bc1f, c.eq.s out=912.500000, fs=456.250000, ft=456.250000
5 bc1f, c.eq.d out=912.500000, fs=456.250000, ft=456.250000
6 bc1f, c.eq.s out=34.031250, fs=3.000000, ft=34.031250
7 bc1f, c.eq.d out=34.031250, fs=3.000000, ft=34.031250
8 bc1f, c.eq.s out=4578.750000, fs=-1.000000, ft=4578.750000
9 bc1f, c.eq.d out=45786.750000, fs=-1.000000, ft=45786.750000
10 bc1f, c.eq.s out=175.000000, fs=1384.500000, ft=175.00000
[all...] |
| fpu_branches.c | 8 printf("--- BC1F --- if fs == ft then " \
11 TESTINST1s("bc1f", i);
12 TESTINST1d("bc1f", i);
|
| macro_fpu.h | 319 "bc1f end"instruction"s"#RDval "\n\t" \
329 printf("%s, bc1f out=%f, fs=%f, ft=%f\n", \
342 "bc1f end"instruction"d"#RDval "\n\t" \
352 printf("%s, bc1f out=%f, fs=%f, ft=%f\n", \
|
| /external/llvm/test/MC/Mips/ |
| micromips-bad-branches.s | 94 # CHECK: bc1f -65535
96 # CHECK: bc1f -65537
98 # CHECK: bc1f 65535
100 # CHECK: bc1f 65536
103 # CHECK: bc1f $fcc0, -65535
105 # CHECK: bc1f $fcc0, -65537
107 # CHECK: bc1f $fcc0, 65535
109 # CHECK: bc1f $fcc0, 65536
199 bc1f -65535
200 bc1f -6553
[all...] |
| mips-bad-branches.s | 174 # CHECK: bc1f -131069
176 # CHECK: bc1f -131070
178 # CHECK: bc1f -131071
180 # CHECK: bc1f -131073
182 # CHECK: bc1f 131069
184 # CHECK: bc1f 131070
186 # CHECK: bc1f 131071
188 # CHECK: bc1f 131072
191 # CHECK: bc1f $fcc0, -131069
193 # CHECK: bc1f $fcc0, -13107
[all...] |
| mips-jump-instructions.s | 13 # CHECK32: bc1f 1332 # encoding: [0x4d,0x01,0x00,0x45]
38 # CHECK64: bc1f 1332 # encoding: [0x4d,0x01,0x00,0x45]
65 bc1f 1332
|
| /external/llvm/test/CodeGen/Mips/ |
| analyzebranch.ll | 13 ; FCC: bc1f $BB
46 ; FCC: bc1f $BB
|
| fpbr.ll | 14 ; FCC: bc1f $BB0_2
48 ; FCC: bc1f $BB1_2
106 ; FCC: bc1f $BB3_2
136 ; FCC: bc1f $BB4_2
|
| /external/llvm/test/MC/Mips/mips1/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
18 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
18 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| invalid-mips32.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 294 case Mips::BC1F:
295 // bc1f $fcc0, $L1 => bc1f $L1
296 return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1f", MI, 1, OS);
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| invalid-mips4.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5.s | 8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
18 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
18 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
18 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 16 bc1f $fcc0, 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
17 bc1f $fcc1, 4 # CHECK: bc1f $fcc1, 4 # encoding: [0x45,0x04,0x00,0x01]
18 bc1f 4 # CHECK: bc1f 4 # encoding: [0x45,0x00,0x00,0x01]
|
| /external/llvm/lib/Target/Mips/ |
| MicroMipsInstrFPU.td | 40 def BC1F_MM : MMRel, BC1F_FT<"bc1f", brtarget_mm, IIBranch, MIPS_BRANCH_F>,
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32.txt | 35 # CHECK: bc1f 1332
38 # CHECK: bc1f $fcc7, 1332
|
