| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetObjectFile.h | 3 // The LLVM Compiler Infrastructure
13 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
14 #include "llvm/Target/TargetLoweringObjectFile.h"
15 #include "llvm/Target/TargetMachine.h"
17 namespace llvm { namespace
33 } // end namespace llvm
|
| /external/llvm/lib/Target/Sparc/TargetInfo/ |
| SparcTargetInfo.cpp | 3 // The LLVM Compiler Infrastructure
11 #include "llvm/IR/Module.h"
12 #include "llvm/Support/TargetRegistry.h"
13 using namespace llvm;
15 Target llvm::TheSparcTarget;
16 Target llvm::TheSparcV9Target;
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZAsmPrinter.h | 1 //===-- SystemZAsmPrinter.h - SystemZ LLVM assembly printer ----*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
14 #include "llvm/CodeGen/AsmPrinter.h"
15 #include "llvm/Support/Compiler.h"
17 namespace llvm { namespace
48 } // end namespace llvm
|
| SystemZMCInstLower.h | 3 // The LLVM Compiler Infrastructure
13 #include "llvm/MC/MCExpr.h"
14 #include "llvm/Support/Compiler.h"
15 #include "llvm/Support/DataTypes.h"
17 namespace llvm { namespace
42 } // end namespace llvm
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-fminv.ll | 6 %min = call float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float> %in)
13 %min = call float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float> %in)
20 %min = call double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double> %in)
24 declare float @llvm.aarch64.neon.fminv.f32.v2f32(<2 x float>)
25 declare float @llvm.aarch64.neon.fminv.f32.v4f32(<4 x float>)
26 declare double @llvm.aarch64.neon.fminv.f64.v2f64(<2 x double>)
31 %max = call float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float> %in)
38 %max = call float @llvm.aarch64.neon.fmaxv.f32.v4f32(<4 x float> %in)
45 %max = call double @llvm.aarch64.neon.fmaxv.f64.v2f64(<2 x double> %in)
49 declare float @llvm.aarch64.neon.fmaxv.f32.v2f32(<2 x float>
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| 2008-02-04-Ctlz.ll | 7 %tmp37 = tail call i64 @llvm.ctlz.i64( i64 %arg, i1 true ) ; <i64> [#uses=1]
8 %tmp47 = tail call i64 @llvm.cttz.i64( i64 %arg, i1 true ) ; <i64> [#uses=1]
9 %tmp57 = tail call i64 @llvm.ctpop.i64( i64 %arg ) ; <i64> [#uses=1]
19 declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone
20 declare i64 @llvm.cttz.i64(i64, i1) nounwind readnone
21 declare i64 @llvm.ctpop.i64(i64) nounwind readnone
|
| /external/llvm/test/CodeGen/NVPTX/ |
| ctpop.ll | 7 %val = tail call i32 @llvm.ctpop.i32(i32 %a)
13 %val = tail call i16 @llvm.ctpop.i16(i16 %a)
19 %val = tail call i64 @llvm.ctpop.i64(i64 %a)
23 declare i16 @llvm.ctpop.i16(i16)
24 declare i32 @llvm.ctpop.i32(i32)
25 declare i64 @llvm.ctpop.i64(i64)
|
| intrinsics.ll | 7 %x = call float @llvm.fabs.f32(float %f)
14 %x = call double @llvm.fabs.f64(double %d)
19 %val = call float @llvm.nvvm.sqrt.f(float %a)
24 declare float @llvm.fabs.f32(float)
25 declare double @llvm.fabs.f64(double)
26 declare float @llvm.nvvm.sqrt.f(float)
|
| /external/llvm/test/CodeGen/R600/ |
| llvm.AMDGPU.barrier.local.ll | 7 %0 = call i32 @llvm.r600.read.tidig.x()
10 call void @llvm.AMDGPU.barrier.local()
11 %2 = call i32 @llvm.r600.read.local.size.x()
20 declare i32 @llvm.r600.read.tidig.x() #0
21 declare void @llvm.AMDGPU.barrier.local()
22 declare i32 @llvm.r600.read.local.size.x() #0
|
| llvm.AMDGPU.imax.ll | 8 %max = call i32 @llvm.AMDGPU.imax(i32 %p0, i32 %load)
10 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
18 %max = call i32 @llvm.AMDGPU.imax(i32 %p0, i32 %p1)
20 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
25 declare i32 @llvm.AMDGPU.imax(i32, i32) #1
27 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
|
| llvm.AMDGPU.imin.ll | 8 %min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %load)
10 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
18 %min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %p1)
20 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
25 declare i32 @llvm.AMDGPU.imin(i32, i32) #1
27 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
|
| wrong-transalu-pos-fix.ll | 14 %x.i = tail call i32 @llvm.r600.read.global.size.x() #1
15 %y.i18 = tail call i32 @llvm.r600.read.global.size.y() #1
17 %z.i17 = tail call i32 @llvm.r600.read.global.size.z() #1
19 %x.i.i = tail call i32 @llvm.r600.read.tgid.x() #1
20 %x.i12.i = tail call i32 @llvm.r600.read.local.size.x() #1
22 %x.i4.i = tail call i32 @llvm.r600.read.tidig.x() #1
25 %y.i.i = tail call i32 @llvm.r600.read.tgid.y() #1
26 %y.i14.i = tail call i32 @llvm.r600.read.local.size.y() #1
28 %y.i6.i = tail call i32 @llvm.r600.read.tidig.y() #1
32 %z.i.i = tail call i32 @llvm.r600.read.tgid.z() #
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| fp-abs-01.ll | 6 declare float @llvm.fabs.f32(float %f)
11 %res = call float @llvm.fabs.f32(float %f)
16 declare double @llvm.fabs.f64(double %f)
21 %res = call double @llvm.fabs.f64(double %f)
28 declare fp128 @llvm.fabs.f128(fp128 %f)
35 %abs = call fp128 @llvm.fabs.f128(fp128 %orig)
|
| /external/llvm/test/CodeGen/X86/ |
| memset-2.ll | 3 declare void @llvm.memset.i32(i8*, i8, i32, i32) nounwind
9 call void @llvm.memset.p0i8.i32(i8* null, i8 0, i32 188, i32 1, i1 false)
17 call void @llvm.memset.p0i8.i32(i8* undef, i8 %c, i32 76, i32 1, i1 false)
21 declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) nounwind
25 tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 8, i32 1, i1 false)
33 tail call void @llvm.memset.p0i8.i32(i8* %s, i8 %a, i32 15, i32 1, i1 false)
|
| rdtsc.ll | 8 %1 = tail call i64 @llvm.readcyclecounter()
23 %1 = tail call i64 @llvm.x86.rdtsc()
35 %1 = tail call i64 @llvm.x86.rdtscp(i8* %A)
46 declare i64 @llvm.readcyclecounter()
47 declare i64 @llvm.x86.rdtscp(i8*)
48 declare i64 @llvm.x86.rdtsc()
|
| stackpointer.ll | 9 %sp = call i64 @llvm.read_register.i64(metadata !0)
10 ; OPT: @llvm.read_register.i64
18 call void @llvm.write_register.i64(metadata !0, i64 %val)
19 ; OPT: @llvm.write_register.i64
23 declare i64 @llvm.read_register.i64(metadata) nounwind
24 declare void @llvm.write_register.i64(metadata, i64) nounwind
|
| /external/llvm/test/Linker/ |
| 2009-09-03-mdnode2.ll | 8 call void @llvm.dbg.func.start(metadata !0)
13 call void @llvm.dbg.stoppoint(i32 3, i32 1, metadata !1)
14 call void @llvm.dbg.region.end(metadata !0)
18 declare void @llvm.dbg.func.start(metadata) nounwind readnone
20 declare void @llvm.dbg.stoppoint(i32, i32, metadata) nounwind readnone
22 declare void @llvm.dbg.region.end(metadata) nounwind readnone
|
| /external/llvm/test/MC/PowerPC/ |
| ppc-llong.s | 2 # RUN: llvm-mc -triple powerpc-unknown-unknown -filetype=obj %s | \
3 # RUN: llvm-readobj -s -sd | FileCheck %s
4 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
5 # RUN: llvm-readobj -s -sd | FileCheck %s
6 # RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \
7 # RUN: llvm-readobj -s -sd | FileCheck %s
|
| ppc-word.s | 2 # RUN: llvm-mc -triple powerpc-unknown-unknown -filetype=obj %s | \
3 # RUN: llvm-readobj -s -sd | FileCheck %s
4 # RUN: llvm-mc -triple powerpc64-unknown-unknown -filetype=obj %s | \
5 # RUN: llvm-readobj -s -sd | FileCheck %s
6 # RUN: llvm-mc -triple powerpc64le-unknown-unknown -filetype=obj %s | \
7 # RUN: llvm-readobj -s -sd | FileCheck %s
|
| /external/llvm/test/Other/ |
| extract.ll | 1 ; RUN: llvm-extract -func foo -S < %s | FileCheck %s
2 ; RUN: llvm-extract -delete -func foo -S < %s | FileCheck --check-prefix=DELETE %s
3 ; RUN: llvm-as < %s > %t
4 ; RUN: llvm-extract -func foo -S %t | FileCheck %s
5 ; RUN: llvm-extract -delete -func foo -S %t | FileCheck --check-prefix=DELETE %s
7 ; llvm-extract uses lazy bitcode loading, so make sure it correctly reads
|
| /external/llvm/test/Transforms/Mem2Reg/ |
| ignore-lifetime.ll | 3 declare void @llvm.lifetime.start(i64 %size, i8* nocapture %ptr)
4 declare void @llvm.lifetime.end(i64 %size, i8* nocapture %ptr)
11 call void @llvm.lifetime.start(i64 2, i8* %B)
13 call void @llvm.lifetime.end(i64 2, i8* %B)
22 call void @llvm.lifetime.start(i64 2, i8* %B)
24 call void @llvm.lifetime.end(i64 2, i8* %B)
|
| /external/llvm/test/Transforms/SLPVectorizer/AArch64/ |
| mismatched-intrinsics.ll | 7 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v4i32
8 ; CHECK: call i64 @llvm.arm64.neon.saddlv.i64.v2i32
10 %vaddlvq_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1) #2
11 %vaddlv_s32.i = tail call i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in2) #2
17 declare i64 @llvm.arm64.neon.saddlv.i64.v4i32(<4 x i32> %in1)
18 declare i64 @llvm.arm64.neon.saddlv.i64.v2i32(<2 x i32> %in1)
|
| /external/llvm/unittests/MC/ |
| MCAtomTest.cpp | 1 //===- llvm/unittest/MC/MCAtomTest.cpp - Instructions unit tests ----------===//
3 // The LLVM Compiler Infrastructure
10 #include "llvm/MC/MCAnalysis/MCAtom.h"
11 #include "llvm/MC/MCAnalysis/MCModule.h"
14 namespace llvm { namespace
31 } // end namespace llvm
|
| /external/llvm/unittests/Support/ |
| formatted_raw_ostream_test.cpp | 1 //===- llvm/unittest/Support/formatted_raw_ostream_test.cpp ---------------===//
3 // The LLVM Compiler Infrastructure
10 #include "llvm/Support/FormattedStream.h"
11 #include "llvm/ADT/SmallString.h"
12 #include "llvm/Support/raw_ostream.h"
15 using namespace llvm;
|
| /external/llvm/test/CodeGen/XCore/ |
| resources.ll | 3 declare i8 addrspace(1)* @llvm.xcore.getr.p1i8(i32 %type)
4 declare void @llvm.xcore.freer.p1i8(i8 addrspace(1)* %r)
5 declare i32 @llvm.xcore.in.p1i8(i8 addrspace(1)* %r)
6 declare i32 @llvm.xcore.int.p1i8(i8 addrspace(1)* %r)
7 declare i32 @llvm.xcore.inct.p1i8(i8 addrspace(1)* %r)
8 declare void @llvm.xcore.out.p1i8(i8 addrspace(1)* %r, i32 %value)
9 declare void @llvm.xcore.outt.p1i8(i8 addrspace(1)* %r, i32 %value)
10 declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value)
11 declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value)
12 declare i32 @llvm.xcore.testct.p1i8(i8 addrspace(1)* %r
[all...] |
