| /external/llvm/lib/Target/XCore/ |
| XCoreFrameToArgsOffsetElim.cpp | 3 // The LLVM Compiler Infrastructure
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunctionPass.h"
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/Support/Compiler.h"
20 #include "llvm/Support/raw_ostream.h"
21 #include "llvm/Target/TargetMachine.h"
22 using namespace llvm;
40 FunctionPass *llvm::createXCoreFrameToArgsOffsetEliminationPass() {
|
| /external/llvm/test/Bitcode/ |
| drop-debug-info.ll | 1 ; RUN: llvm-as < %s -o %t.bc 2>&1 >/dev/null | FileCheck -check-prefix=WARN %s
2 ; RUN: llvm-dis < %t.bc | FileCheck %s
11 !llvm.dbg.cu = !{!0}
12 !llvm.module.flags = !{!9}
14 !0 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.5 (trunk 195495) (llvm/trunk 195495:195504M)", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/manmanren/llvm_gmail/release/../llvm/tools/clang/test/CodeGen/debug-info-version.c] [DW_LANG_C99]
15 !1 = metadata !{metadata !"../llvm/tools/clang/test/CodeGen/debug-info-version.c", metadata !"/Users/manmanren/llvm_gmail/release"}
19 !5 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type ] [/Users/manmanren/llvm_gmail/release/../llvm/tools/clang/test/CodeGen/debug-info-version.c]
28 ; CHECK-NOT: !llvm.dbg.cu
|
| /external/llvm/test/CodeGen/ARM/ |
| intrinsics-memory-barrier.ll | 6 call void @llvm.arm.dmb(i32 3) ; CHECK: dmb osh
7 call void @llvm.arm.dsb(i32 7) ; CHECK: dsb nsh
8 call void @llvm.arm.isb(i32 15) ; CHECK: isb sy
19 call void @llvm.arm.dmb(i32 15) ; CHECK: dmb sy
32 call void @llvm.arm.dsb(i32 15) ; CHECK: dsb sy
45 call void @llvm.arm.isb(i32 15) ; CHECK: isb sy
53 declare void @llvm.arm.dmb(i32)
54 declare void @llvm.arm.dsb(i32)
55 declare void @llvm.arm.isb(i32)
|
| vqshrn.ll | 7 %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftns.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
15 %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftns.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
23 %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftns.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
31 %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftnu.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
39 %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftnu.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
47 %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftnu.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
55 %tmp2 = call <8 x i8> @llvm.arm.neon.vqshiftnsu.v8i8(<8 x i16> %tmp1, <8 x i16> < i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8, i16 -8 >)
63 %tmp2 = call <4 x i16> @llvm.arm.neon.vqshiftnsu.v4i16(<4 x i32> %tmp1, <4 x i32> < i32 -16, i32 -16, i32 -16, i32 -16 >)
71 %tmp2 = call <2 x i32> @llvm.arm.neon.vqshiftnsu.v2i32(<2 x i64> %tmp1, <2 x i64> < i64 -32, i64 -32 >)
75 declare <8 x i8> @llvm.arm.neon.vqshiftns.v8i8(<8 x i16>, <8 x i16>) nounwind readnon
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| overflow.ll | 8 %sadd = tail call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
15 declare { i8, i1 } @llvm.sadd.with.overflow.i8(i8, i8) nounwind readnone
19 %sadd = tail call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 %a, i16 %b)
26 declare { i16, i1 } @llvm.sadd.with.overflow.i16(i16, i16) nounwind readnone
30 %sadd = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)
37 declare { i32, i1 } @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
44 %uadd = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %a, i8 %b)
51 declare { i8, i1 } @llvm.uadd.with.overflow.i8(i8, i8) nounwind readnone
55 %uadd = tail call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 %a, i16 %b)
62 declare { i16, i1 } @llvm.uadd.with.overflow.i16(i16, i16) nounwind readnon
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| f16c-intrinsics.ll | 6 %res = call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %a0) ; <<4 x float>> [#uses=1]
9 declare <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16>) nounwind readonly
14 %res = call <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16> %a0) ; <<8 x float>> [#uses=1]
17 declare <8 x float> @llvm.x86.vcvtph2ps.256(<8 x i16>) nounwind readonly
22 %res = call <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]
25 declare <8 x i16> @llvm.x86.vcvtps2ph.128(<4 x float>, i32) nounwind readonly
30 %res = call <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float> %a0, i32 0) ; <<8 x i16>> [#uses=1]
33 declare <8 x i16> @llvm.x86.vcvtps2ph.256(<8 x float>, i32) nounwind readonly
44 %res = tail call <4 x float> @llvm.x86.vcvtph2ps.128(<8 x i16> %bc) #2
|
| fma3-intrinsics.ll | 7 %res = call <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
10 declare <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
14 %res = call <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
17 declare <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
21 %res = call <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) nounwind
24 declare <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
28 %res = call <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
31 declare <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
35 %res = call <4 x float> @llvm.x86.fma.vfnmadd.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind
38 declare <4 x float> @llvm.x86.fma.vfnmadd.ps(<4 x float>, <4 x float>, <4 x float>) nounwind readnon
[all...] |
| movbe.ll | 4 declare i16 @llvm.bswap.i16(i16) nounwind readnone
5 declare i32 @llvm.bswap.i32(i32) nounwind readnone
6 declare i64 @llvm.bswap.i64(i64) nounwind readnone
9 %bswap = call i16 @llvm.bswap.i16(i16 %y)
20 %bswap = call i16 @llvm.bswap.i16(i16 %load)
29 %bswap = call i32 @llvm.bswap.i32(i32 %y)
40 %bswap = call i32 @llvm.bswap.i32(i32 %load)
49 %bswap = call i64 @llvm.bswap.i64(i64 %y)
60 %bswap = call i64 @llvm.bswap.i64(i64 %load)
|
| /external/llvm/test/Transforms/StripSymbols/ |
| 2010-06-30-StripDebug.ll | 3 ; CHECK-NOT: llvm.dbg
9 tail call void @llvm.dbg.value(metadata !9, i64 0, metadata !5), !dbg !10
13 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
15 !llvm.dbg.cu = !{!2}
16 !llvm.module.flags = !{!13}
17 !llvm.dbg.sp = !{!0}
18 !llvm.dbg.lv.foo = !{!5}
19 !llvm.dbg.gv = !{!8}
23 !2 = metadata !{i32 524305, metadata !12, i32 1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, metadata !4, metadata !4, null, null, null, metadata !""} ; [ DW_TAG_compile_unit ]
|
| /external/llvm/tools/obj2yaml/ |
| obj2yaml.cpp | 3 // The LLVM Compiler Infrastructure
12 #include "llvm/Object/Archive.h"
13 #include "llvm/Object/COFF.h"
14 #include "llvm/Support/CommandLine.h"
15 #include "llvm/Support/ManagedStatic.h"
16 #include "llvm/Support/PrettyStackTrace.h"
17 #include "llvm/Support/Signals.h"
19 using namespace llvm;
20 using namespace llvm::object;
|
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUAsmBackend.cpp | 3 // The LLVM Compiler Infrastructure
11 #include "llvm/ADT/StringRef.h"
12 #include "llvm/MC/MCAsmBackend.h"
13 #include "llvm/MC/MCAssembler.h"
14 #include "llvm/MC/MCObjectWriter.h"
15 #include "llvm/MC/MCValue.h"
16 #include "llvm/Support/TargetRegistry.h"
18 using namespace llvm;
73 MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T, StringRef TT) {
|
| /frameworks/compile/mclinker/lib/LD/ |
| ELFReader.cpp | 23 #include <llvm/ADT/StringRef.h>
24 #include <llvm/ADT/Twine.h>
25 #include <llvm/Support/ELF.h>
26 #include <llvm/Support/Host.h>
48 const llvm::ELF::Elf32_Ehdr* hdr =
49 reinterpret_cast<const llvm::ELF::Elf32_Ehdr*>(pELFHeader);
50 if (0 == memcmp(llvm::ELF::ElfMagic, hdr, 4))
70 llvm::StringRef pRegion,
74 size_t entsize = pRegion.size()/sizeof(llvm::ELF::Elf32_Sym);
75 const llvm::ELF::Elf32_Sym* symtab
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| dsp-r1.ll | 7 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 15)
11 declare i32 @llvm.mips.extr.w(i64, i32) nounwind
17 %1 = tail call i32 @llvm.mips.extr.w(i64 %a0, i32 %a1)
25 %1 = tail call i32 @llvm.mips.extr.r.w(i64 %a0, i32 15)
29 declare i32 @llvm.mips.extr.r.w(i64, i32) nounwind
35 %1 = tail call i32 @llvm.mips.extr.s.h(i64 %a0, i32 %a1)
39 declare i32 @llvm.mips.extr.s.h(i64, i32) nounwind
45 %1 = tail call i32 @llvm.mips.extr.rs.w(i64 %a0, i32 15)
49 declare i32 @llvm.mips.extr.rs.w(i64, i32) nounwind
55 %1 = tail call i32 @llvm.mips.extr.rs.w(i64 %a0, i32 %a1
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPU.h | 3 // The LLVM Compiler Infrastructure
14 #include "llvm/Support/TargetRegistry.h"
15 #include "llvm/Target/TargetMachine.h"
17 namespace llvm { namespace
33 } // End namespace llvm
|
| /external/clang/test/CodeGen/ |
| arm-neon-misc.c | 8 // RUN: -emit-llvm -w -o - %s | FileCheck %s
17 // CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
21 // CHECK: call void @llvm.arm.neon.vst1.v1i64
27 // CHECK: call <2 x i64> @llvm.arm.neon.vld1.v2i64
30 // CHECK: call <1 x i64> @llvm.arm.neon.vld1.v1i64
|
| bounds-checking.c | 1 // RUN: %clang_cc1 -fsanitize=local-bounds -emit-llvm -triple x86_64-apple-darwin10 %s -o - | FileCheck %s
2 // RUN: %clang_cc1 -fsanitize=array-bounds -O -fsanitize-undefined-trap-on-error -emit-llvm -triple x86_64-apple-darwin10 -DNO_DYNAMIC %s -o - | FileCheck %s
7 // CHECK: call {{.*}} @llvm.trap
14 // CHECK-NOT: call {{.*}} @llvm.trap
27 // CHECK: call {{.*}} @llvm.trap
|
| dependent-lib.c | 1 // RUN: %clang_cc1 %s --dependent-lib=msvcrt -triple i686-pc-win32 -emit-llvm -o - | FileCheck %s
2 // RUN: %clang_cc1 %s --dependent-lib=msvcrt -triple x86_64-pc-win32 -emit-llvm -o - | FileCheck %s
3 // RUN: %clang_cc1 %s --dependent-lib=msvcrt -triple i686-pc-linux -emit-llvm -o - | FileCheck -check-prefix LINUX %s
5 // CHECK: !llvm.module.flags = !{{{.*}}}
10 // LINUX: !llvm.module.flags = !{{{.*}}}
|
| pragma-loop.cpp | 1 // RUN: %clang_cc1 -triple x86_64-apple-darwin -std=c++11 -emit-llvm -o - %s | FileCheck %s
13 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_1:.*]]
25 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_2:.*]]
37 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_3:.*]]
49 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_4:.*]]
58 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_5:.*]]
72 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_6:.*]]
83 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_7:.*]]
94 // CHECK: br i1 {{.*}}, label {{.*}}, label {{.*}}, !llvm.loop ![[LOOP_8:.*]]
112 // CHECK: ![[UNROLLENABLE_1]] = metadata !{metadata !"llvm.loop.unroll.enable", i1 true
[all...] |
| /external/clang/test/Driver/ |
| tsan.c | 1 // RUN: %clang -target x86_64-unknown-linux -fsanitize=thread %s -S -emit-llvm -o - | FileCheck %s
2 // RUN: %clang -O1 -target x86_64-unknown-linux -fsanitize=thread %s -S -emit-llvm -o - | FileCheck %s
3 // RUN: %clang -O2 -target x86_64-unknown-linux -fsanitize=thread %s -S -emit-llvm -o - | FileCheck %s
4 // RUN: %clang -O3 -target x86_64-unknown-linux -fsanitize=thread %s -S -emit-llvm -o - | FileCheck %s
5 // RUN: %clang -target x86_64-unknown-linux -fsanitize=thread %s -S -emit-llvm -o - | FileCheck %s
|
| /external/clang/test/Frontend/ |
| ir-support.c | 1 // Test that we can consume LLVM IR/bitcode in the frontend and produce
9 // LLVM bitcode:
10 // RUN: %clang_cc1 -emit-llvm-bc -o %t.bc %s
14 // LLVM IR source code:
15 // RUN: %clang_cc1 -emit-llvm -o %t.ll %s
|
| /external/clang/www/demo/ |
| what is this directory.txt | 1 This is for the LLVM+Clang browser based demo.
2 It is supposed to work like the LLVM+GCC demo here: http://llvm.org/demo/ but for the BSD licensed Clang instead.
7 Anyways, right now, these file a basically just a copy of the LLVM+GCC demo (no changes have been made). The files don't even work right in this location on the server. As such, someone will need to edit the file or rewrite it.
9 If nobody in the LLVM community has the skills, one suggestion would be to post a request on a friendly Perl forum and see if anybody might be interested in taking on the challenge.
|
| /external/llvm/bindings/ocaml/irreader/ |
| llvm_irreader.ml | 1 (*===-- llvm_irreader.ml - LLVM OCaml Interface ---------------*- OCaml -*-===*
3 * The LLVM Compiler Infrastructure
16 external parse_ir : Llvm.llcontext -> Llvm.llmemorybuffer -> Llvm.llmodule
|
| /external/llvm/bindings/ocaml/linker/ |
| llvm_linker.mli | 1 (*===-- llvm_linker.mli - LLVM OCaml Interface -----------------*- OCaml -*-===*
3 * The LLVM Compiler Infrastructure
12 This interface provides an OCaml API for LLVM bitcode linker,
26 val link_modules : Llvm.llmodule -> Llvm.llmodule -> Mode.t -> uni
|
| /external/llvm/bindings/ocaml/target/ |
| llvm_target.ml | 1 (*===-- llvm_target.ml - LLVM OCaml Interface ------------------*- OCaml -*-===*
3 * The LLVM Compiler Infrastructure
58 external add_to_pass_manager : [<Llvm.PassManager.any]
59 Llvm.PassManager.t -> t -> unit
63 external intptr_type : Llvm.llcontext -> t -> Llvm.lltype
67 external qualified_intptr_type : Llvm.llcontext -> int -> t -> Llvm.lltype
69 external size_in_bits : Llvm.lltype -> t -> Int64.t
71 external store_size : Llvm.lltype -> t -> Int64.
[all...] |
| /external/llvm/bindings/ocaml/transforms/passmgr_builder/ |
| llvm_passmgr_builder.ml | 1 (*===-- llvm_passmgr_builder.ml - LLVM OCaml Interface --------*- OCaml -*-===*
3 * The LLVM Compiler Infrastructure
25 : [ `Function ] Llvm.PassManager.t -> t -> unit
28 : [ `Module ] Llvm.PassManager.t -> t -> unit
31 : [ `Module ] Llvm.PassManager.t -> internalize:bool -> run_inliner:bool -> t -> unit
|
