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  /external/llvm/test/Assembler/
2006-09-28-CrashOnInvalid.ll 1 ; Test for PR902. This program is erroneous, but should not crash llvm-as.
3 ; RUN: not llvm-as < %s >/dev/null 2> %t
2007-03-19-NegValue.ll 2 ; RUN: llvm-as < %s | llvm-dis | grep "add i65.*, -1"
2007-04-25-AssemblerFoldExternWeak.ll 1 ; RUN: llvm-as < %s | llvm-dis | grep "icmp.*test_weak.*null"
2007-09-10-AliasFwdRef.ll 1 ; RUN: llvm-as < %s | llvm-dis
2009-02-28-StripOpaqueName.ll 1 ; RUN: opt < %s -strip -S | llvm-as | llvm-dis
2009-03-24-ZextConstantExpr.ll 1 ; RUN: llvm-as < %s | llvm-dis
global-addrspace-forwardref.ll 1 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
half.ll 1 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
x86mmx.ll 1 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
  /external/llvm/test/Bindings/llvm-c/
globals.ll 1 ; RUN: llvm-as < %s | llvm-c-test --module-list-globals | FileCheck %s
  /external/llvm/test/Bitcode/
2006-12-11-Cast-ConstExpr.ll 3 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
2009-06-11-FirstClassAggregateConstant.ll 1 ; RUN: llvm-as < %s | llvm-dis -disable-output
arm32_neon_vcnt_upgrade.ll 1 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
7 %tmp2 = call <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16> %tmp1)
8 ;CHECK: {{call.*@llvm.ctlz.v4i16\(<4 x i16>.*, i1 false}}
15 %tmp2 = call <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8> %tmp1)
16 ;CHECK: call <8 x i8> @llvm.ctpop.v8i8(<8 x i8>
20 declare <4 x i16> @llvm.arm.neon.vclz.v4i16(<4 x i16>) nounwind readnone
21 declare <8 x i8> @llvm.arm.neon.vcnt.v8i8(<8 x i8>) nounwind readnone
select.ll 1 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
  /external/llvm/test/CodeGen/AArch64/
arm64-trap.ll 5 tail call void @llvm.trap()
8 declare void @llvm.trap() nounwind
  /external/llvm/test/CodeGen/ARM/
hints.ll 5 declare void @llvm.arm.hint(i32) nounwind
9 tail call void @llvm.arm.hint(i32 0) nounwind
18 tail call void @llvm.arm.hint(i32 1) nounwind
27 tail call void @llvm.arm.hint(i32 2) nounwind
36 tail call void @llvm.arm.hint(i32 3) nounwind
45 tail call void @llvm.arm.hint(i32 4) nounwind
54 tail call void @llvm.arm.hint(i32 5) nounwind
63 tail call void @llvm.arm.hint(i32 8) nounwind
thread_pointer.ll 6 %tmp1 = call i8* @llvm.arm.thread.pointer( ) ; <i8*> [#uses=0]
10 declare i8* @llvm.arm.thread.pointer()
  /external/llvm/test/CodeGen/Generic/
fpowi-promote.ll 7 %tmp2339 = call float @llvm.powi.f32( float %tmp23302331, i32 %tmp23282329 )
11 declare float @llvm.powi.f32(float,i32)
  /external/llvm/test/CodeGen/Mips/
2008-08-08-ctlz.ll 6 call i32 @llvm.ctlz.i32( i32 %u, i1 true )
10 declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone
  /external/llvm/test/CodeGen/NVPTX/
isspacep.ll 3 declare i1 @llvm.nvvm.isspacep.const(i8*) readnone noinline
4 declare i1 @llvm.nvvm.isspacep.global(i8*) readnone noinline
5 declare i1 @llvm.nvvm.isspacep.local(i8*) readnone noinline
6 declare i1 @llvm.nvvm.isspacep.shared(i8*) readnone noinline
11 %v = tail call i1 @llvm.nvvm.isspacep.const(i8* %addr)
18 %v = tail call i1 @llvm.nvvm.isspacep.global(i8* %addr)
25 %v = tail call i1 @llvm.nvvm.isspacep.local(i8* %addr)
32 %v = tail call i1 @llvm.nvvm.isspacep.shared(i8* %addr)
  /external/llvm/test/CodeGen/PowerPC/
popcnt.ll 4 %cnt = tail call i8 @llvm.ctpop.i8(i8 %x)
13 %cnt = tail call i16 @llvm.ctpop.i16(i16 %x)
22 %cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
30 %cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
37 declare i8 @llvm.ctpop.i8(i8) nounwind readnone
38 declare i16 @llvm.ctpop.i16(i16) nounwind readnone
39 declare i32 @llvm.ctpop.i32(i32) nounwind readnone
40 declare i64 @llvm.ctpop.i64(i64) nounwind readnone
  /external/llvm/test/CodeGen/SPARC/
trap.ll 4 tail call void @llvm.trap()
11 declare void @llvm.trap()
  /external/llvm/test/CodeGen/Thumb/
trap.ll 8 call void @llvm.trap()
12 declare void @llvm.trap() nounwind
  /external/llvm/test/CodeGen/X86/GC/
deadargelim.ll 3 declare void @llvm.gcroot(i8**, i8*)
14 call void @llvm.gcroot(i8** %var, i8* null)
lower_gcroot.ll 7 call void @llvm.gcroot( %Env* %Root, %Env null )
11 declare void @llvm.gcroot(%Env*, %Env)

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