| /external/clang/lib/CodeGen/ |
| CGOpenMPRuntime.h | 3 // The LLVM Compiler Infrastructure
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/IR/Type.h"
20 #include "llvm/IR/Value.h"
22 namespace llvm { namespace
34 } // namespace llvm
47 /// from http://llvm.org/svn/llvm-project/openmp/trunk/runtime/src/kmp.h
78 llvm::Constant *DefaultOpenMPPSource;
80 typedef llvm::DenseMap<unsigned, llvm::Value *> OpenMPDefaultLocMapTy
[all...] |
| CGObjCRuntime.h | 3 // The LLVM Compiler Infrastructure
24 namespace llvm { namespace
87 llvm::Value *BaseValue,
90 llvm::Value *Offset);
100 llvm::Constant *beginCatchFn,
101 llvm::Constant *endCatchFn,
102 llvm::Constant *exceptionRethrowFn);
109 llvm::Function *syncEnterFn,
110 llvm::Function *syncExitFn);
117 virtual llvm::Function *ModuleInitFunction() = 0
[all...] |
| CodeGenModule.cpp | 1 //===--- CodeGenModule.cpp - Emit LLVM Code from ASTs for a Module --------===//
3 // The LLVM Compiler Infrastructure
43 #include "llvm/ADT/APSInt.h"
44 #include "llvm/ADT/Triple.h"
45 #include "llvm/IR/CallSite.h"
46 #include "llvm/IR/CallingConv.h"
47 #include "llvm/IR/DataLayout.h"
48 #include "llvm/IR/Intrinsics.h"
49 #include "llvm/IR/LLVMContext.h"
50 #include "llvm/IR/Module.h
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXUtilities.cpp | 3 // The LLVM Compiler Infrastructure
15 #include "llvm/IR/Constants.h"
16 #include "llvm/IR/Function.h"
17 #include "llvm/IR/GlobalVariable.h"
18 #include "llvm/IR/Module.h"
19 #include "llvm/IR/Operator.h"
25 #include "llvm/Support/ManagedStatic.h"
26 #include "llvm/IR/InstIterator.h"
27 #include "llvm/Support/MutexGuard.h"
29 using namespace llvm;
[all...] |
| /external/llvm/include/llvm/Config/ |
| llvm-config.h.cmake | 1 /*===------- llvm/Config/llvm-config.h - llvm configuration -------*- C -*-===*/
3 /* The LLVM Compiler Infrastructure */
10 /* This file enumerates variables from the LLVM configuration so that they
12 This is a C header that can be included in the llvm-c headers. */
20 /* Time at which LLVM was configured */
26 /* Target triple LLVM will generate code for by default */
41 /* Host triple LLVM will be executed on */
53 /* LLVM architecture name for the native architecture, if available *
[all...] |
| /external/llvm/lib/Option/ |
| Arg.cpp | 3 // The LLVM Compiler Infrastructure
10 #include "llvm/Option/Arg.h"
11 #include "llvm/ADT/SmallString.h"
12 #include "llvm/ADT/Twine.h"
13 #include "llvm/Option/ArgList.h"
14 #include "llvm/Option/Option.h"
15 #include "llvm/Support/raw_ostream.h"
17 using namespace llvm;
18 using namespace llvm::opt;
48 llvm::errs() << "<"
[all...] |
| /external/llvm/test/Assembler/ |
| functionlocal-metadata.ll | 1 ; RUN: llvm-as < %s | llvm-dis | FileCheck %s
5 call void @llvm.dbg.value(metadata !{ i32* %1 }, i64 16, metadata !2)
6 ; CHECK: call void @llvm.dbg.value(metadata !{i32* %1}, i64 16, metadata ![[ID2:[0-9]+]])
11 call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32* %1})
13 call void @llvm.dbg.declare(metadata !{i32 %two}, metadata !{i32 %0})
15 call void @llvm.dbg.declare(metadata !{i32 %0}, metadata !{i32* %1, i32 %0})
17 call void @llvm.dbg.declare(metadata !{i32* %1}, metadata !{i32 %b, i32 %0})
19 call void @llvm.dbg.declare(metadata !{i32 %a}, metadata !{i32 %a, metadata !"foo"})
21 call void @llvm.dbg.declare(metadata !{i32 %b}, metadata !{metadata !0, i32 %two}
[all...] |
| /frameworks/compile/libbcc/tools/bcc_strip_attr/ |
| bcc_strip_attr.cpp | 17 #include "llvm/Bitcode/ReaderWriter.h"
18 #include "llvm/IR/LLVMContext.h"
19 #include "llvm/IR/Module.h"
20 #include "llvm/IR/Verifier.h"
21 #include "llvm/IRReader/IRReader.h"
22 #include "llvm/Pass.h"
23 #include "llvm/PassManager.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/FileSystem.h"
26 #include "llvm/Support/ManagedStatic.h
[all...] |
| /art/compiler/llvm/ |
| backend_options.h | 20 #include <llvm/Support/CommandLine.h>
23 extern llvm::cl::opt<bool> EnableARMLongCalls; \
24 extern llvm::cl::opt<bool> ReserveR9;
37 #include "llvm/Config/Targets.def"
40 namespace llvm { namespace in namespace:art
44 #include "llvm/Config/Targets.def"
47 } // namespace llvm
|
| /art/compiler/llvm/tools/ |
| gen_art_module_cc.sh | 32 #include <llvm/IR/DerivedTypes.h>
33 #include <llvm/IR/Function.h>
34 #include <llvm/IR/Module.h>
35 #include <llvm/IR/Type.h>
39 using namespace llvm;
42 namespace llvm {
49 } // namespace llvm
|
| /external/clang/include/clang/CodeGen/ |
| BackendUtil.h | 1 //===--- BackendUtil.h - LLVM Backend Utilities -----------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
13 #include "clang/Basic/LLVM.h"
15 namespace llvm { namespace
27 Backend_EmitBC, ///< Emit LLVM bitcode files
28 Backend_EmitLL, ///< Emit human-readable LLVM assembly
36 StringRef TDesc, llvm::Module *M, BackendAction Action,
|
| /external/clang/include/clang/Driver/ |
| Util.h | 3 // The LLVM Compiler Infrastructure
13 #include "clang/Basic/LLVM.h"
14 #include "llvm/ADT/DenseMap.h"
16 namespace llvm { namespace
28 typedef llvm::DenseMap<const JobAction*, const char*> ArgStringMap;
33 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
34 const char* getARMCPUForMArch(StringRef MArch, const llvm::Triple &Triple);
|
| /external/clang/test/CodeGen/ |
| arm64_vMaxMin.c | 1 // RUN: %clang_cc1 -O1 -triple arm64-apple-ios7 -target-feature +neon -ffreestanding -S -o - -emit-llvm %s | FileCheck %s
12 // CHECK @llvm.aarch64.neon.smaxv.i32.v8i8
18 // CHECK llvm.aarch64.neon.uminv.i16.v8i16
25 // CHECK llvm.aarch64.neon.umin.v8i8
31 // CHECK llvm.aarch64.neon.umin.v16i8
37 // CHECK llvm.aarch64.neon.smax.v8i16
44 // CHECK llvm.aarch64.neon.fmax.v2f64
50 // CHECK llvm.aarch64.neon.fmax.v4f32
56 // CHECK llvm.aarch64.neon.fmin.v2f64
62 // CHECK llvm.aarch64.neon.fmax.v2f3
[all...] |
| mips-count-builtins.c | 1 // RUN: %clang_cc1 %s -triple mips-unknown-linux-gnu -emit-llvm -o - | FileCheck %s
13 // CHECK: call i16 @llvm.ctlz.i16(i16 {{.*}}, i1 false)
14 // CHECK: call i16 @llvm.cttz.i16(i16 {{.*}}, i1 false)
22 // CHECK: call i32 @llvm.ctlz.i32(i32 {{.*}}, i1 false)
23 // CHECK: call i32 @llvm.cttz.i32(i32 {{.*}}, i1 false)
30 // CHECK: call i64 @llvm.ctlz.i64(i64 {{.*}}, i1 false)
31 // CHECK: call i64 @llvm.cttz.i64(i64 {{.*}}, i1 false)
|
| rdrand-builtins.c | 1 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -target-feature +rdrnd -target-feature +rdseed -emit-llvm -o - %s | FileCheck %s
11 // CHECK: call { i16, i32 } @llvm.x86.rdrand.16
18 // CHECK: call { i32, i32 } @llvm.x86.rdrand.32
25 // CHECK: call { i64, i32 } @llvm.x86.rdrand.64
32 // CHECK: call { i16, i32 } @llvm.x86.rdseed.16
39 // CHECK: call { i32, i32 } @llvm.x86.rdseed.32
46 // CHECK: call { i64, i32 } @llvm.x86.rdseed.64
|
| /external/llvm/bindings/ocaml/irreader/ |
| llvm_irreader.mli | 1 (*===-- llvm_irreader.mli - LLVM OCaml Interface --------------*- OCaml -*-===*
3 * The LLVM Compiler Infrastructure
12 This interface provides an OCaml API for the LLVM assembly reader, the
20 encountered. See the function [llvm::ParseIR]. *)
21 val parse_ir : Llvm.llcontext -> Llvm.llmemorybuffer -> Llvm.llmodule
|
| /external/llvm/lib/MC/ |
| MCRelocationInfo.cpp | 3 // The LLVM Compiler Infrastructure
10 #include "llvm/MC/MCRelocationInfo.h"
11 #include "llvm-c/Disassembler.h"
12 #include "llvm/Object/ObjectFile.h"
13 #include "llvm/Support/TargetRegistry.h"
15 using namespace llvm;
37 MCRelocationInfo *llvm::createMCRelocationInfo(StringRef TT, MCContext &Ctx) {
|
| /external/llvm/lib/Support/ |
| ErrorHandling.cpp | 3 // The LLVM Compiler Infrastructure
15 #include "llvm/Support/ErrorHandling.h"
16 #include "llvm-c/Core.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/ADT/Twine.h"
19 #include "llvm/Config/config.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/Errc.h"
22 #include "llvm/Support/Signals.h"
23 #include "llvm/Support/Mutex.h
[all...] |
| /external/llvm/lib/Target/PowerPC/TargetInfo/ |
| PowerPCTargetInfo.cpp | 3 // The LLVM Compiler Infrastructure
11 #include "llvm/IR/Module.h"
12 #include "llvm/Support/TargetRegistry.h"
13 using namespace llvm;
15 Target llvm::ThePPC32Target, llvm::ThePPC64Target, llvm::ThePPC64LETarget;
|
| /external/llvm/test/Analysis/BasicAA/ |
| getmodrefinfo-cs-cs.ll | 15 ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false)
16 ; CHECK: NoModRef: call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false) <-> call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false)
18 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
23 call void @llvm.memset.p0i8.i64(i8* @A, i8 0, i64 1, i32 1, i1 false)
24 call void @llvm.memset.p0i8.i64(i8* @B, i8 0, i64 1, i32 1, i1 false)
|
| /external/llvm/test/CodeGen/ARM/ |
| intrinsics-crypto.ll | 6 %tmp3 = call <16 x i8> @llvm.arm.neon.aesd(<16 x i8> %tmp, <16 x i8> %tmp2)
8 %tmp4 = call <16 x i8> @llvm.arm.neon.aese(<16 x i8> %tmp3, <16 x i8> %tmp2)
10 %tmp5 = call <16 x i8> @llvm.arm.neon.aesimc(<16 x i8> %tmp4)
12 %tmp6 = call <16 x i8> @llvm.arm.neon.aesmc(<16 x i8> %tmp5)
22 %resscalar = call i32 @llvm.arm.neon.sha1h(i32 %scalar)
25 %res2 = call <4 x i32> @llvm.arm.neon.sha1c(<4 x i32> %tmp2, i32 %scalar, <4 x i32> %res1)
27 %res3 = call <4 x i32> @llvm.arm.neon.sha1m(<4 x i32> %res2, i32 %scalar, <4 x i32> %res1)
29 %res4 = call <4 x i32> @llvm.arm.neon.sha1p(<4 x i32> %res3, i32 %scalar, <4 x i32> %res1)
31 %res5 = call <4 x i32> @llvm.arm.neon.sha1su0(<4 x i32> %res4, <4 x i32> %tmp3, <4 x i32> %res1)
33 %res6 = call <4 x i32> @llvm.arm.neon.sha1su1(<4 x i32> %res5, <4 x i32> %res1
[all...] |
| /external/llvm/test/CodeGen/R600/ |
| llvm.SI.fs.interp.constant.ll | 8 %4 = call float @llvm.SI.fs.constant(i32 0, i32 0, i32 %3)
9 %5 = call i32 @llvm.SI.packf16(float %4, float %4)
11 call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 1, float %6, float %6, float %6, float %6)
15 declare void @llvm.AMDGPU.shader.type(i32)
17 declare float @llvm.SI.fs.constant(i32, i32, i32) readnone
19 declare i32 @llvm.SI.packf16(float, float) readnone
21 declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
|
| /external/llvm/test/CodeGen/Thumb/ |
| stack-coloring-without-frame-ptr.ll | 15 call void @llvm.lifetime.start(i64 16, i8* %1) nounwind
16 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %1, i8* %0, i32 16, i32 4, i1 false)
17 call void @llvm.lifetime.end(i64 16, i8* %1) nounwind
20 call void @llvm.lifetime.start(i64 20, i8* %2) nounwind
25 declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind
27 declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind
29 declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind
|
| /external/llvm/test/Feature/ |
| md_on_instruction.ll | 1 ; RUN: llvm-as < %s | llvm-dis | grep " !dbg " | count 4
5 call void @llvm.dbg.func.start(metadata !0)
10 call void @llvm.dbg.region.end(metadata !0)
15 declare void @llvm.dbg.func.start(metadata) nounwind readnone
17 declare void @llvm.dbg.region.end(metadata) nounwind readnone
19 !llvm.module.flags = !{!6}
|
| /external/llvm/test/Transforms/InstCombine/ |
| bitcount.ll | 4 ; RUN: grep -v declare | not grep llvm.ct
6 declare i31 @llvm.ctpop.i31(i31 %val)
7 declare i32 @llvm.cttz.i32(i32 %val, i1)
8 declare i33 @llvm.ctlz.i33(i33 %val, i1)
11 %c1 = call i31 @llvm.ctpop.i31(i31 12415124)
12 %c2 = call i32 @llvm.cttz.i32(i32 87359874, i1 true)
13 %c3 = call i33 @llvm.ctlz.i33(i33 87359874, i1 true)
|
