| /external/llvm/test/CodeGen/X86/ |
| 2009-04-21-NoReloadImpDef.ll | 8 ; CHECK-NEXT: pinsrw
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/x86/ |
| idctllm_sse2.asm | 36 pinsrw xmm4, [rax+32], 4
37 pinsrw xmm5, [rdx], 4
496 pinsrw xmm0, [rdx], 0
497 pinsrw xmm0, [rdx+2], 4
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/encoder/x86/ |
| quantize_sse4.asm | 154 pinsrw %5, edi, %2 ; qcoeff[rc]
|
| /external/chromium_org/third_party/openssl/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.pl | 240 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
280 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
319 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
359 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
625 $code =~ s/pinsrw\s+\$0,/movd /gm;
|
| rc4-586.pl | 121 &pinsrw ($mm,&DWP(0,$dat,$ty,4),$j);
126 # Using pinsrw here improves performane on Intel CPUs by 2-3%, but
|
| rc4-x86_64.pl | 275 $code.=" pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n";
|
| /external/openssl/crypto/rc4/asm/ |
| rc4-md5-x86_64.pl | 240 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
280 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
319 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
359 #rc4# pinsrw \$`($j>>1)&7`,($dat,$TX[0],4),$xmm\n
625 $code =~ s/pinsrw\s+\$0,/movd /gm;
|
| rc4-586.pl | 121 &pinsrw ($mm,&DWP(0,$dat,$ty,4),$j);
126 # Using pinsrw here improves performane on Intel CPUs by 2-3%, but
|
| /external/llvm/lib/Target/X86/ |
| README-SSE.txt | 334 pinsrw $6, %eax, %xmm0
335 pinsrw $7, %eax, %xmm0
651 pinsrw $2, %eax, %xmm0
653 pinsrw $3, %eax, %xmm0
655 pinsrw $7, %eax, %xmm0
663 pinsrw $3, %eax, %xmm0
|
| X86InstrMMX.td | 564 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
572 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
|
| X86ISelLowering.h | 177 /// PINSRW - Insert the lower 16-bits of a 32-bit value to a vector,
178 /// corresponds to X86::PINSRW.
179 PINSRW, MMX_PINSRW,
[all...] |
| X86TargetTransformInfo.cpp | 506 {ISD::VECTOR_SHUFFLE, MVT::v8i16, 8}, // 4 x pextrw + 4 pinsrw.
508 // 8 x (pinsrw + pextrw + and + movb + movzb + or)
[all...] |
| /external/chromium_org/media/base/simd/ |
| convert_rgb_to_yuv_ssse3.asm | 105 pinsrw %1, WORD [ARGBq + TEMPq * 2 + 4], 3
|
| /external/chromium_org/third_party/openssl/openssl/crypto/modes/asm/ |
| ghash-x86.pl | 712 # by 16, which is why last argument to pinsrw is 2, which
746 &pinsrw ($red[0],&WP(0,$rem_8bit,$rem[1],2),2) if ($i>0);
778 &pinsrw ($red[0],&WP(0,$rem_8bit,$rem[1],2),2);
782 &pinsrw ($red[2],&WP(0,$rem_8bit,$rem[0],2),3); # last is <<48
[all...] |
| /external/openssl/crypto/modes/asm/ |
| ghash-x86.pl | 712 # by 16, which is why last argument to pinsrw is 2, which
746 &pinsrw ($red[0],&WP(0,$rem_8bit,$rem[1],2),2) if ($i>0);
778 &pinsrw ($red[0],&WP(0,$rem_8bit,$rem[1],2),2);
782 &pinsrw ($red[2],&WP(0,$rem_8bit,$rem[0],2),3); # last is <<48
[all...] |
| /external/stressapptest/src/ |
| adler32memcpy.cc | 304 // Note: this copy must be performed before pinsrw instructions since
|
| /external/valgrind/main/none/tests/amd64/ |
| sse4-64.c | [all...] |
| sse4-64.stdout.exp | [all...] |
| sse4-64.stdout.exp-older-glibc | [all...] |
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/tests/ |
| avx.asm | 1571 pinsrw xmm1, eax, 5 label
1572 pinsrw xmm1, word [rax], 5 label
1573 pinsrw xmm1, [rax], byte 5 label
[all...] |
| /external/chromium_org/third_party/libvpx/source/libvpx/ |
| CHANGELOG | 560 Replace pinsrw (SSE) with MMX instructions
|
| /external/libvpx/libvpx/ |
| CHANGELOG | 560 Replace pinsrw (SSE) with MMX instructions
|
| /external/valgrind/main/docs/internals/ |
| 3_2_BUGSTATUS.txt | 205 142104 pinsrw and pmovmskb with 64-bit regs
|
| /hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/ |
| CHANGELOG | 560 Replace pinsrw (SSE) with MMX instructions
|
| /external/elfutils/0.153/libcpu/defs/ |
| i386 | 773 01100110,00001111,11000100,{mod}{xmmreg}{r_m},{imm8}:pinsrw {imm8},{mod}{r_m},{xmmreg}
774 00001111,11000100,{mod}{mmxreg}{r_m},{imm8}:pinsrw {imm8},{mod}{r_m},{mmxreg}
[all...] |
