/external/chromium_org/tools/traceline/traceline/ |
assembler.h | 61 EBP = 5, 208 set_modrm(0, EBP); 237 if (disp == 0 && base != EBP) { 267 set_sib(scale, index, EBP);
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/external/libunwind/src/x86/ |
Gget_save_loc.c | 45 case UNW_X86_EBP: loc = c->dwarf.loc[EBP]; break;
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init.h | 38 c->dwarf.loc[EBP] = DWARF_REG_LOC (&c->dwarf, UNW_X86_EBP);
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Gregs.c | 84 case UNW_X86_EBP: loc = c->dwarf.loc[EBP]; break;
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Gos-freebsd.c | 128 c->dwarf.loc[EBP] = DWARF_LOC (uc_addr + FREEBSD_UC_MCONTEXT_EBP_OFF, 0);
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Gos-linux.c | 128 c->dwarf.loc[EBP] = DWARF_LOC (sc_addr + LINUX_SC_EBP_OFF, 0);
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/external/qemu/target-i386/ |
smm_helper.c | 90 stq_phys(sm_state + 0x7fd0, EBP); 113 stl_phys(sm_state + 0x7fe4, EBP); 216 EBP = ldq_phys(sm_state + 0x7fd0); 243 EBP = ldl_phys(sm_state + 0x7fe4);
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cpu.h | [all...] |
seg_helper.c | 293 cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), EBP); 307 cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), EBP); 359 EBP = new_regs[5]; 1159 uint32_t esp_mask, esp, ebp; local 1194 target_ulong esp, ebp; local [all...] |
/external/lzma/Asm/x86/ |
7zAsm.asm | 47 x5 equ EBP
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/external/llvm/lib/Target/X86/ |
X86RegisterInfo.cpp | 76 FramePtr = X86::EBP; 492 // FrameIndex with base register with EBP. Add an offset to the offset. 495 // Now add the frame object offset to the offset from EBP. 546 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 574 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 611 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 647 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP: 648 return X86::EBP; 683 case X86::BPL: case X86::BP: case X86::EBP: case X86::RBP:
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X86CodeEmitter.cpp | 523 // If the base is not EBP/ESP and there is no displacement, use simple 525 // encoding for [EBP] with no displacement means [disp32] so we handle it 527 if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) { 560 } else if (DispVal == 0 && BaseRegNo != N86::EBP) { 566 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/x86/ |
x86_xform3.S | 580 PUSH_L( EBP ) 611 MOV_L( SRC1, EBP ) 615 MOV_L( EBP, DST1 ) 636 POP_L( EBP )
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assyntax.h | 110 #define EBP bp 172 #define EBP %ebp [all...] |
/external/mesa3d/src/mesa/x86/ |
x86_xform3.S | 580 PUSH_L( EBP ) 611 MOV_L( SRC1, EBP ) 615 MOV_L( EBP, DST1 ) 636 POP_L( EBP )
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assyntax.h | 110 #define EBP bp 172 #define EBP %ebp [all...] |
/art/compiler/utils/x86/ |
assembler_x86.h | 156 if (disp == 0 && base != EBP) { 174 SetSIB(scale, index, EBP); 180 if (disp == 0 && base != EBP) { 196 result.SetModRM(0, EBP);
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/external/llvm/lib/Target/X86/Disassembler/ |
X86DisassemblerDecoder.h | 140 ENTRY(EBP) \ 158 ENTRY(EBP) \
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/external/valgrind/main/VEX/auxprogs/ |
genoffsets.c | 92 GENOFFSET(X86,x86,EBP);
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/external/valgrind/main/coregrind/m_sigframe/ |
sigframe-x86-linux.c | 376 SC2(ebp,EBP); 658 tst->arch.vex.guest_EBP = sc->ebp;
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86AsmBackend.cpp | 456 // Encode that we are using EBP/RBP as the frame pointer. 483 (Is64Bit ? X86::RBP : X86::EBP) && "Invalid frame pointer!"); 612 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
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X86MCCodeEmitter.cpp | 466 if (Disp.getImm() == 0 && BaseRegNo != N86::EBP) { 509 // If the base is not EBP/ESP and there is no displacement, use simple 511 // encoding for [EBP] with no displacement means [disp32] so we handle it 513 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) { 563 BaseRegNo != N86::EBP) { 569 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP 573 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP [all...] |
/external/libunwind/src/ptrace/ |
_UPT_reg_offset.c | 262 UNW_R_OFF(EBP, ebp)
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/external/llvm/lib/Target/X86/AsmParser/ |
X86Operand.h | 347 case X86::RBP: return X86::EBP;
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/external/qemu-pc-bios/bochs/ |
bochs.h | 59 #undef EBP
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