/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
radeon_vert_fc.c | 57 for(inst = fc_state->C->Program.Instructions.Next; 58 inst != &fc_state->C->Program.Instructions; 64 /* Most of the control flow instructions only write the 217 for(inst = c->Program.Instructions.Next; 218 inst != &c->Program.Instructions;
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r3xx_vertprog.c | 372 for(rci = compiler->Base.Program.Instructions.Next; rci != &compiler->Base.Program.Instructions; rci = rci->Next) { 377 /* Skip instructions writing to non-existing destination */ 390 rc_error(&compiler->Base, "Vertex program has too many instructions\n"); 447 "Too many flow control instructions."); 567 for(inst = compiler->Base.Program.Instructions.Next; inst != &compiler->Base.Program.Instructions; inst = inst->Next) { 590 for(inst = compiler->Base.Program.Instructions.Next; inst != &compiler->Base.Program.Instructions; inst = inst->Next) { 592 /* Instructions inside of loops need to use the ENDLOO [all...] |
radeon_emulate_branches.c | 220 /* Insert the CMP instructions at the end. */ 228 /* Remove all traces of the branch instructions */ 288 for(struct rc_instruction * inst = s->C->Program.Instructions.Next; 289 inst != &s->C->Program.Instructions; 294 inst_mov = rc_insert_new_instruction(s->C, s->C->Program.Instructions.Prev); 305 * Remove branch instructions; instead, execute both branches 307 * using CMP instructions in place of the original ENDIF. 318 ptr = c->Program.Instructions.Next; 319 while(ptr != &c->Program.Instructions) {
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
radeon_vert_fc.c | 57 for(inst = fc_state->C->Program.Instructions.Next; 58 inst != &fc_state->C->Program.Instructions; 64 /* Most of the control flow instructions only write the 217 for(inst = c->Program.Instructions.Next; 218 inst != &c->Program.Instructions;
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r3xx_vertprog.c | 372 for(rci = compiler->Base.Program.Instructions.Next; rci != &compiler->Base.Program.Instructions; rci = rci->Next) { 377 /* Skip instructions writing to non-existing destination */ 390 rc_error(&compiler->Base, "Vertex program has too many instructions\n"); 447 "Too many flow control instructions."); 567 for(inst = compiler->Base.Program.Instructions.Next; inst != &compiler->Base.Program.Instructions; inst = inst->Next) { 590 for(inst = compiler->Base.Program.Instructions.Next; inst != &compiler->Base.Program.Instructions; inst = inst->Next) { 592 /* Instructions inside of loops need to use the ENDLOO [all...] |
radeon_emulate_branches.c | 220 /* Insert the CMP instructions at the end. */ 228 /* Remove all traces of the branch instructions */ 288 for(struct rc_instruction * inst = s->C->Program.Instructions.Next; 289 inst != &s->C->Program.Instructions; 294 inst_mov = rc_insert_new_instruction(s->C, s->C->Program.Instructions.Prev); 305 * Remove branch instructions; instead, execute both branches 307 * using CMP instructions in place of the original ENDIF. 318 ptr = c->Program.Instructions.Next; 319 while(ptr != &c->Program.Instructions) {
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/external/oprofile/events/i386/westmere/ |
events | 16 event:0x0b counters:0,1,2,3 um:mem_inst_retired minimum:2000000 name:MEM_INST_RETIRED : Memory instructions retired above 0 clocks (Precise Event) 19 event:0x0f counters:0,1,2,3 um:mem_uncore_retired minimum:40000 name:MEM_UNCORE_RETIRED : Load instructions retired that HIT modified data in sibling core (Precise Event) 24 event:0x17 counters:0,1,2,3 um:x01 minimum:2000000 name:INST_QUEUE_WRITES : Instructions written to instruction queue. 25 event:0x18 counters:0,1,2,3 um:x01 minimum:2000000 name:INST_DECODED : Instructions that must be decoded by decoder 0 26 event:0x19 counters:0,1,2,3 um:x01 minimum:2000000 name:TWO_UOP_INSTS_DECODED : Two Uop instructions decoded 27 event:0x1e counters:0,1,2,3 um:x01 minimum:2000000 name:INST_QUEUE_WRITE_CYCLES : Cycles instructions are written to the instruction queue 48 event:0x88 counters:0,1,2,3 um:br_inst_exec minimum:200000 name:BR_INST_EXEC : Branch instructions executed 51 event:0xa6 counters:0,1,2,3 um:x01 minimum:2000000 name:MACRO_INSTS : Macro-fused instructions decoded 63 event:0xc0 counters:0,1,2,3 um:inst_retired minimum:2000000 name:INST_RETIRED : Instructions retired (Programmable counter and Precise Event) 66 event:0xc4 counters:0,1,2,3 um:br_inst_retired minimum:200000 name:BR_INST_RETIRED : Retired branch instructions (Precise Event [all...] |
/external/chromium_org/third_party/sfntly/cpp/src/sfntly/table/truetype/ |
glyph_table.h | 91 virtual ReadableFontData* Instructions() = 0; 199 virtual CALLER_ATTACH ReadableFontData* Instructions(); 280 virtual CALLER_ATTACH ReadableFontData* Instructions();
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/external/sfntly/cpp/src/sfntly/table/truetype/ |
glyph_table.h | 91 virtual ReadableFontData* Instructions() = 0; 199 virtual CALLER_ATTACH ReadableFontData* Instructions(); 280 virtual CALLER_ATTACH ReadableFontData* Instructions();
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/external/chromium_org/third_party/mesa/src/src/mesa/program/ |
prog_optimize.c | 170 * \return number of instructions removed 183 /* begin a run of instructions to remove */ 188 /* extend the run of instructions to remove */ 194 * instructions are to be removed. 224 struct prog_instruction *inst = prog->Instructions + i; 244 * Remove dead instructions from the given program. 246 * that are written to but never read. Remove any instructions that 268 const struct prog_instruction *inst = prog->Instructions + i; 321 /* find instructions that write to dead registers, flag for removal */ 323 struct prog_instruction *inst = prog->Instructions + i [all...] |
/external/mesa3d/src/mesa/program/ |
prog_optimize.c | 170 * \return number of instructions removed 183 /* begin a run of instructions to remove */ 188 /* extend the run of instructions to remove */ 194 * instructions are to be removed. 224 struct prog_instruction *inst = prog->Instructions + i; 244 * Remove dead instructions from the given program. 246 * that are written to but never read. Remove any instructions that 268 const struct prog_instruction *inst = prog->Instructions + i; 321 /* find instructions that write to dead registers, flag for removal */ 323 struct prog_instruction *inst = prog->Instructions + i [all...] |
/external/llvm/tools/bugpoint/ |
CrashDebugger.cpp | 21 #include "llvm/IR/Instructions.h" 355 /// non-terminator instructions and replacing them with undef. 386 SmallPtrSet<Instruction*, 64> Instructions; 389 Instructions.insert(cast<Instruction>(VMap[Insts[i]])); 392 outs() << "Checking for crash with only " << Instructions.size(); 393 if (Instructions.size() == 1) 396 outs() << " instructions: "; 402 if (!Instructions.count(Inst) && !isa<TerminatorInst>(Inst) && 423 for (SmallPtrSet<Instruction*, 64>::const_iterator I = Instructions.begin(), 424 E = Instructions.end(); I != E; ++I [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/main/ |
atifragshader.c | 86 if (s->Instructions[i]) 87 free(s->Instructions[i]); 341 /* if the shader was already defined free instructions and get new ones 345 if (ctx->ATIFragmentShader.Current->Instructions[i]) 346 free(ctx->ATIFragmentShader.Current->Instructions[i]); 351 /* malloc the instructions here - not sure if the best place but its 354 ctx->ATIFragmentShader.Current->Instructions[i] = 422 GLuint op0 = curProg->Instructions[j][i].Opcode[0]; 423 GLuint op1 = curProg->Instructions[j][i].Opcode[1]; 426 GLuint count0 = curProg->Instructions[j][i].ArgCount[0] [all...] |
/external/mesa3d/src/mesa/main/ |
atifragshader.c | 86 if (s->Instructions[i]) 87 free(s->Instructions[i]); 341 /* if the shader was already defined free instructions and get new ones 345 if (ctx->ATIFragmentShader.Current->Instructions[i]) 346 free(ctx->ATIFragmentShader.Current->Instructions[i]); 351 /* malloc the instructions here - not sure if the best place but its 354 ctx->ATIFragmentShader.Current->Instructions[i] = 422 GLuint op0 = curProg->Instructions[j][i].Opcode[0]; 423 GLuint op1 = curProg->Instructions[j][i].Opcode[1]; 426 GLuint count0 = curProg->Instructions[j][i].ArgCount[0] [all...] |
/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/ |
st_atom_pixeltransfer.c | 210 * two TEX instructions: 266 fp->Base.Instructions = _mesa_alloc_instructions(ic); 267 if (!fp->Base.Instructions) { 274 _mesa_copy_instructions(fp->Base.Instructions, inst, ic);
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/external/mesa3d/src/mesa/state_tracker/ |
st_atom_pixeltransfer.c | 210 * two TEX instructions: 266 fp->Base.Instructions = _mesa_alloc_instructions(ic); 267 if (!fp->Base.Instructions) { 274 _mesa_copy_instructions(fp->Base.Instructions, inst, ic);
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/external/chromium_org/sandbox/linux/seccomp-bpf/ |
codegen.cc | 40 for (Instructions::iterator iter = instructions_.begin(); 143 // We can handle non-jumping instructions and "always" jumps. Both of 153 SANDBOX_DIE("Cannot append instructions after a return statement"); 161 // Non-jumping instructions do not use any of the branch targets. 199 // Merge two instructions, or set the branch target for an "always" jump. 205 SANDBOX_DIE("Cannot append instructions in the middle of a sequence"); 214 SANDBOX_DIE("Cannot append instructions after a jump"); 218 SANDBOX_DIE("Cannot append instructions after a return statement"); 220 SANDBOX_DIE("Cannot append instructions in the middle of a sequence"); 239 void CodeGen::FindBranchTargets(const Instruction& instructions, [all...] |
/frameworks/compile/libbcc/lib/Renderscript/ |
RSEmbedInfo.cpp | 25 #include <llvm/IR/Instructions.h>
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/external/chromium_org/third_party/WebKit/ManualTests/inspector-wrappers/ |
inspector-wrappers-test-utils.js | 27 function instructions(params) { function 32 "<p>Instructions:</p>" +
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/external/llvm/test/MC/Mips/ |
micromips-loadstore-instructions.s | 6 # for load and store instructions. 8 # Load and Store Instructions
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micromips-shift-instructions.s | 4 # for shift instructions. 6 # Shift Instructions
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micromips-trap-instructions.s | 6 # for miscellaneous instructions 8 # Miscellaneous Instructions
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/external/llvm/test/MC/Mips/mips32r6/ |
invalid-mips1.s | 0 # Instructions that are invalid
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/external/llvm/test/MC/Mips/mips5/ |
invalid-mips64.s | 0 # Instructions that are invalid
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/external/oprofile/events/mips/20K/ |
events | 7 event:0x1 counters:0 um:zero minimum:500 name:INSN_ISSUED : Dispatched/issued instructions 9 event:0x3 counters:0 um:zero minimum:500 name:FP_INSNS_COMPLETED : Instructions completed in FPU datapath (computational event:instructions only) 18 event:0xc counters:0 um:zero minimum:500 name:RPS_MISSPREDICTS : JR instructions that mispredicted using the Return Prediction Stack (RPS)
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