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  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
r500_fragprog_emit.c 241 error("emit_alu: Too many instructions");
247 /* Quirk: MDH/MDV (DDX/DDY) need a NOP on previous non-TEX instructions. */
377 error("emit_tex: Too many instructions");
448 rc_error(s->C, "emit_tex: Too many instructions");
527 /* Set jump address for the BRK instructions. */
533 /* Set jump address for CONT instructions. */
637 for(struct rc_instruction * inst = compiler->Base.Program.Instructions.Next;
638 inst != &compiler->Base.Program.Instructions && !compiler->Base.Error;
668 rc_error(&compiler->Base, "Introducing fake OUT: Too many instructions");
radeon_program_alu.c 31 * Shareable transformations that transform "special" ALU instructions
32 * into ALU instructions that are supported by hardware.
358 * to pair instructions correctly.
649 * Eliminates the following ALU instructions:
901 * instructions of the r300 up to r500 vertex engine.
999 * using only the basic instructions
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  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
brw_wm_fp.c 181 * Instructions
283 * Special instructions for interpolation and other tasks
294 * two instructions as a temporary is required.
554 * Expand various instructions here to simpler forms.
655 * Some TEX instructions require extra code, cube map coordinate
657 * This function emits those extra instructions and the TEX
1008 * Emit INTERP instructions ahead of first use of each attrib.
1076 /* Emit preamble instructions. This is where special instructions such as
1081 const struct prog_instruction *inst = &fp->program.Base.Instructions[insn]
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brw_vs_emit.c 108 struct prog_instruction *inst = vp->Base.Instructions + i;
255 struct prog_instruction *inst = &c->vp->program.Base.Instructions[i];
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  /external/chromium_org/third_party/mesa/src/src/mesa/program/
nvfragparse.c 87 static const struct instruction_pattern Instructions[] = {
152 GLuint numInst; /* number of instructions parsed */
226 for (inst = Instructions; inst->name; inst++) {
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  /external/llvm/test/MC/Mips/mips1/
invalid-mips3.s 0 # Instructions that are invalid
  /external/llvm/test/MC/Mips/mips2/
invalid-mips32r2.s 0 # Instructions that are invalid
invalid-mips4.s 0 # Instructions that are invalid
invalid-mips5.s 0 # Instructions that are invalid