| /external/llvm/lib/Transforms/IPO/ |
| StripSymbols.cpp | 144 SmallPtrSet<Constant*, 4> Operands;
147 Operands.insert(cast<Constant>(C->getOperand(i)));
157 for (SmallPtrSet<Constant*, 4>::iterator OI = Operands.begin(),
158 OE = Operands.end(); OI != OE; ++OI)
|
| /external/llvm/utils/TableGen/ |
| X86RecognizableInstr.h | 63 /// Inferred from the operands; indicates whether the L bit in the VEX prefix is set
95 /// The operands of the instruction, as listed in the CodeGenInstruction.
96 /// They are not one-to-one with operands listed in the MCInst; for example,
97 /// memory operands expand to 5 operands in the MCInst
98 const std::vector<CGIOperandList::OperandInfo>* Operands;
116 /// prefix. If it does, 32-bit register operands stay
131 /// If it is not, then 16-bit immediate operands stay 16-bit.
137 /// handles operands that are in the REG field of the ModR/M byte.
142 /// handles operands that are in the REG field of the ModR/M byte
[all...] |
| DAGISelMatcher.cpp | 273 for (unsigned i = 0, e = Operands.size(); i != e; ++i)
274 OS << Operands[i] << ' ';
336 M->Operands == Operands && M->HasChain == HasChain &&
343 return (HashString(OpcodeName) << 4) | Operands.size();
|
| CodeGenInstruction.cpp | 88 // If we have MIOpInfo, then we have #operands equal to number of entries
293 : TheDef(R), Operands(R), InferredFrom(nullptr) {
307 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable");
339 ParseConstraints(R->getValueAsString("Constraints"), Operands);
342 Operands.ProcessDisableEncoding(R->getValueAsString("DisableEncoding"));
451 // For register operands, the source register class can be a subclass
495 // Handle "zero_reg" for optional def operands.
499 // Tied operands where the source is a sub-operand of a complex operand
500 // need to represent both operands in the alias destination instruction.
502 // the MC representation of things doesn't use tied operands at all
[all...] |
| CodeGenDAGPatterns.h | 193 /// constraint to the nodes operands. This returns true if it makes a
216 /// getNumOperands - This is the number of operands required or -1 if
237 /// constraints for this node to the operands of the node. This returns
412 /// Returns the number of MachineInstr operands that would be produced by this
415 /// for Operands; otherwise 1.
537 /// It's important that the usage of operands in ComplexPatterns is
626 std::vector<Record*> Operands;
632 const std::vector<Record*> &operands,
634 : Pattern(TP), Results(results), Operands(operands),
[all...] |
| DAGISelMatcher.h | [all...] |
| AsmMatcherEmitter.cpp | 11 // assembly operands in the MCInst structures. It also emits a matcher for
14 // Converting assembly operands into MCInst structures
18 // operands. The target specific parser should generally eliminate any syntax
22 // operands.
59 // arbitrary operands, we expect the user to define the classes and their
63 // By partitioning the operands in this way, we guarantee that for any
65 // of the sets of operands which could classify to that tuple.
78 // Some targets need a custom way to parse operands, some specific instructions
146 /// class of operands which can be matched.
169 /// sake user operands only record their immediate super class, while registe
[all...] |
| CodeGenDAGPatterns.cpp | 359 // Both operands must be integer or FP, but we don't care which.
873 /// constraint to the nodes operands. This returns true if it makes a
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 74 // Operands are allocated by an ArrayRecycler.
75 MachineOperand *Operands; // Pointer to the first operand.
76 unsigned NumOperands; // Number of operands on instruction.
78 OperandCapacity CapOperands; // Capacity of the Operands array.
111 /// implicit operands. It reserves space for number of operands specified by
272 /// Access to explicit operands of the instruction.
278 return Operands[i];
282 return Operands[i];
285 /// getNumExplicitOperands - Returns the number of non-implicit operands
[all...] |
| /external/llvm/include/llvm/Analysis/ |
| ScalarEvolution.h | 637 const SCEV *getAddRecExpr(SmallVectorImpl<const SCEV *> &Operands,
639 const SCEV *getAddRecExpr(const SmallVectorImpl<const SCEV *> &Operands,
641 SmallVector<const SCEV *, 4> NewOp(Operands.begin(), Operands.end());
645 const SCEV *getSMaxExpr(SmallVectorImpl<const SCEV *> &Operands);
647 const SCEV *getUMaxExpr(SmallVectorImpl<const SCEV *> &Operands);
706 /// getUMaxFromMismatchedTypes - Promote the operands to the wider of
712 /// getUMinFromMismatchedTypes - Promote the operands to the wider of
718 /// getPointerBase - Transitively follow the chain of pointer-type operands
[all...] |
| TargetTransformInfo.h | 116 ArrayRef<const Value *> Operands) const;
|
| /external/llvm/lib/MC/MCAnalysis/ |
| MCModuleYAML.cpp | 95 std::vector<Operand> Operands;
195 IO.mapRequired("Ops", I.Operands);
323 A.Insts[i].Operands.resize(OpCount);
325 A.Insts[i].Operands[oi].MCOp = MCDI.Inst.getOperand(oi);
381 for (OpIt OI = II->Operands.begin(), OE = II->Operands.end(); OI != OE;
|
| /external/llvm/lib/Analysis/ |
| ScalarEvolution.cpp | 527 // Compare the number of operands.
856 SmallVector<const SCEV *, 4> Operands;
861 Operands.push_back(S);
864 return getAddExpr(Operands);
871 SmallVector<const SCEV *, 4> Operands;
[all...] |
| TargetTransformInfo.cpp | 49 const Value *Ptr, ArrayRef<const Value *> Operands) const {
50 return PrevTTI->getGEPCost(Ptr, Operands);
324 ArrayRef<const Value *> Operands) const override {
327 for (unsigned Idx = 0, Size = Operands.size(); Idx != Size; ++Idx)
328 if (!isa<Constant>(Operands[Idx]))
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 241 bool ParseOperand(OperandVector &Operands);
249 OperandVector &Operands, MCStreamer &Out,
279 SMLoc NameLoc, OperandVector &Operands) override;
448 assert(N == 1 && "Invalid number of operands!");
453 assert(N == 1 && "Invalid number of operands!");
458 assert(N == 1 && "Invalid number of operands!");
463 assert(N == 1 && "Invalid number of operands!");
482 assert(N == 1 && "Invalid number of operands!");
487 assert(N == 1 && "Invalid number of operands!");
492 assert(N == 1 && "Invalid number of operands!");
[all...] |
| /external/llvm/lib/Transforms/Vectorize/ |
| SLPVectorizer.cpp | 305 // Check whether all operands on one side have the same opcode. In this case
376 // Don't reorder if the operands where good to begin with.
676 // If all of the operands are identical or constant we have a simple solution.
850 ValueList Operands;
853 Operands.push_back(cast<PHINode>(VL[j])->getIncomingValueForBlock(
856 buildTree_rec(Operands, Depth + 1);
907 ValueList Operands;
910 Operands.push_back(cast<Instruction>(VL[j])->getOperand(i));
912 buildTree_rec(Operands, Depth+1);
935 ValueList Operands;
[all...] |
| /external/llvm/lib/IR/ |
| ConstantsContext.h | 58 // allocate space for exactly two operands
79 // allocate space for exactly three operands
100 // allocate space for exactly two operands
121 // allocate space for exactly three operands
143 // allocate space for exactly three operands
242 // allocate space for exactly two operands
326 operands(ops.begin(), ops.end()), indices(inds.begin(), inds.end()) {}
330 std::vector<Constant*> operands; member in struct:llvm::ExprMapKeyType
336 this->operands == that.operands &
[all...] |
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 51 const MCInst &Inst, OperandVector &Operands, MCContext &Ctx,
53 InstrumentMOV(Inst, Operands, Ctx, MII, Out);
66 void InstrumentMOV(const MCInst &Inst, OperandVector &Operands,
98 const MCInst &Inst, OperandVector &Operands, MCContext &Ctx,
135 for (unsigned Ix = 0; Ix < Operands.size(); ++Ix) {
136 assert(Operands[Ix]);
137 MCParsedAsmOperand &Op = *Operands[Ix];
489 const MCInst &Inst, OperandVector &Operands, MCContext &Ctx,
|
| /external/llvm/lib/Transforms/Utils/ |
| CloneFunction.cpp | 168 SmallVector<Value*, 16> Operands;
170 Operands.push_back(Node->getOperand(i));
172 Operands.push_back(Operand);
173 MDNode *NewNode = MDNode::get(Node->getContext(), Operands);
320 // Eagerly remap operands to the newly cloned instruction, except for PHI
484 // Map operands for blocks that are live and remove operands for blocks
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILPeepholeOptimizer.cpp | 663 Value *Operands[4] = {
669 CallInst *CI = CallInst::Create(Func, Operands, "BitInsertOpt");
828 Value *Operands[3] = {
833 // Lets create the Call with the operands
834 CallInst *CI = CallInst::Create(Func, Operands, "ByteExtractOpt");
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 111 /// This is essentially just bitcasting the operands to a different type and
139 // the operands because we are going to check their values at some point.
158 // node is only legalized after all of its operands are legalized.
192 // Legalize the operands
364 SmallVector<SDValue, 4> Operands(Op.getNumOperands());
368 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j));
370 Operands[j] = Op.getOperand(j);
373 Op = DAG.getNode(Op.getOpcode(), dl, NVT, Operands);
396 SmallVector<SDValue, 4> Operands(Op.getNumOperands());
402 Operands[j] = DAG.getNode(Opc, dl, NVT, Op.getOperand(j))
[all...] |
| /external/llvm/lib/DebugInfo/ |
| DWARFDebugFrame.cpp | 61 /// opcode and an optional sequence of operands.
62 typedef std::vector<uint64_t> Operands;
69 Operands Ops;
75 /// operands to the Instructions vector.
126 // No operands
130 // Operands: Address
134 // Operands: 1-byte delta
138 // Operands: 2-byte delta
142 // Operands: 4-byte delta
150 // Operands: ULEB12
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILPeepholeOptimizer.cpp | 663 Value *Operands[4] = {
669 CallInst *CI = CallInst::Create(Func, Operands, "BitInsertOpt");
828 Value *Operands[3] = {
833 // Lets create the Call with the operands
834 CallInst *CI = CallInst::Create(Func, Operands, "ByteExtractOpt");
[all...] |
| /external/llvm/include/llvm/TableGen/ |
| Record.h | 861 virtual OpInit *clone(std::vector<Init *> &Operands) const = 0;
903 OpInit *clone(std::vector<Init *> &Operands) const override {
904 assert(Operands.size() == 1 &&
905 "Wrong number of operands for unary operation");
906 return UnOpInit::get(getOpcode(), *Operands.begin(), getType());
951 OpInit *clone(std::vector<Init *> &Operands) const override {
952 assert(Operands.size() == 2 &
[all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| SCCP.cpp | 429 // because they have potentially new operands.
667 // Look at all of the executable operands of the PHI node. If any of them
671 // If there are no executable operands, the PHI remains undefined.
862 // Otherwise, one of our operands is overdefined. Try to produce something
[all...] |
