| /prebuilts/ndk/9/platforms/android-17/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 65 #define RDI 112
|
| /prebuilts/ndk/9/platforms/android-18/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 65 #define RDI 112
|
| /prebuilts/ndk/9/platforms/android-19/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 65 #define RDI 112
|
| /prebuilts/ndk/9/platforms/android-19/arch-x86_64/usr/include/asm/ |
| ptrace-abi.h | 65 #define RDI 112
|
| /prebuilts/ndk/9/platforms/android-9/arch-x86/usr/include/asm/ |
| ptrace-abi.h | 65 #define RDI 112
|
| /art/compiler/utils/x86_64/ |
| managed_register_x86_64_test.cc | 55 reg = X86_64ManagedRegister::FromCpuRegister(RDI);
61 EXPECT_EQ(RDI, reg.AsCpuRegister());
151 EXPECT_EQ(RDI, reg.AsRegisterPairHigh());
178 EXPECT_EQ(RDI, reg.AsRegisterPairHigh());
196 EXPECT_EQ(RDI, reg.AsRegisterPairHigh());
205 EXPECT_EQ(RDI, reg.AsRegisterPairHigh());
212 EXPECT_TRUE(!reg_eax.Equals(X86_64ManagedRegister::FromCpuRegister(RDI)));
223 EXPECT_TRUE(!reg_xmm0.Equals(X86_64ManagedRegister::FromCpuRegister(RDI)));
234 EXPECT_TRUE(!reg_st0.Equals(X86_64ManagedRegister::FromCpuRegister(RDI)));
245 EXPECT_TRUE(!reg_pair.Equals(X86_64ManagedRegister::FromCpuRegister(RDI)));
[all...] |
| assembler_x86_64_test.cc | 53 registers_.push_back(new x86_64::CpuRegister(x86_64::RDI));
132 x86_64::CpuRegister(x86_64::RDI), x86_64::CpuRegister(x86_64::RBX), x86_64::TIMES_4, 12));
134 x86_64::CpuRegister(x86_64::RDI), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_4, 12));
136 x86_64::CpuRegister(x86_64::RDI), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_4, 12));
140 "movl 0xc(%RDI,%RBX,4), %EAX\n"
141 "movl 0xc(%RDI,%R9,4), %EAX\n"
142 "movl 0xc(%RDI,%R9,4), %R8d\n";
185 registers.push_back(new x86_64::CpuRegister(x86_64::RDI));
203 byte_regs[x86_64::RDI] = "dil";
254 x86_64::X86_64ManagedRegister method_reg = ManagedFromCpu(x86_64::RDI);
[all...] |
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/objfmts/win64/tests/ |
| sce3.asm | 14 mov [rsp+010h], rdi
15 [savereg rdi, 010h]; you can still use RSP as the base of the frame
37 mov rdi, [rbp-010h]
47 .SavedRdi resq 1 ; saved register RDI
53 .SavedRdi resq 1 ; Saved Register RDI
59 save_reg rdi, sampleFrame.SavedRdi
66 mov rdi, [rsp+sampleFrame.SavedRdi]
|
| /external/libunwind/src/x86_64/ |
| unwind_i.h | 44 #define RDI 5
|
| init.h | 54 c->dwarf.loc[RDI] = REG_INIT_LOC(c, rdi, RDI);
|
| Gregs.c | 112 case UNW_X86_64_RDI: loc = c->dwarf.loc[RDI]; break;
|
| Gos-freebsd.c | 52 48 8d 7c 24 10 lea SIGF_UC(%rsp),%rdi
116 c->dwarf.loc[RDI] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RDI, 0);
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/sysroot/usr/include/asm/ |
| ptrace-abi.h | 43 #define RDI 112
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.8/sysroot/usr/include/asm/ |
| ptrace-abi.h | 43 #define RDI 112
|
| /art/compiler/jni/quick/x86_64/ |
| calling_convention_x86_64.cc | 67 return X86_64ManagedRegister::FromCpuRegister(RDI);
174 case 0: res = X86_64ManagedRegister::FromCpuRegister(RDI); break;
204 // Other (integer) arguments passed through GPR (RDI, RSI, RDX, RCX, R8, R9)
|
| /external/lzma/Asm/x86/ |
| 7zAsm.asm | 69 r7 equ RDI
|
| /art/runtime/arch/x86_64/ |
| context_x86_64.cc | 76 gprs_[RDI] = nullptr;
|
| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.cpp | 136 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI : X86::EDI,
234 Chain = DAG.getCopyToReg(Chain, dl, Subtarget.is64Bit() ? X86::RDI :
|
| X86RegisterInfo.cpp | 544 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
572 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
609 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
645 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
681 case X86::DIL: case X86::DI: case X86::EDI: case X86::RDI:
682 return X86::RDI;
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmInstrumentation.cpp | 359 EmitInstruction(Out, MCInstBuilder(X86::PUSH64r).addReg(X86::RDI));
364 Inst.addOperand(MCOperand::CreateReg(X86::RDI));
369 Out, MCInstBuilder(X86::MOV64rr).addReg(X86::RAX).addReg(X86::RDI));
428 EmitInstruction(Out, MCInstBuilder(X86::POP64r).addReg(X86::RDI));
|
| X86Operand.h | 285 (getMemBaseReg() == X86::RDI || getMemBaseReg() == X86::EDI ||
350 case X86::RDI: return X86::EDI;
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 178 ENTRY(RDI) \
196 ENTRY(RDI) \
|
| /external/llvm/test/MC/X86/ |
| intel-syntax.s | 58 // CHECK: movl %fs:(%rdi), %eax
59 mov EAX, DWORD PTR FS:[RDI]
60 // CHECK: leal (,%rdi,4), %r8d
61 lea R8D, DWORD PTR [4*RDI]
|
| /external/valgrind/main/VEX/auxprogs/ |
| genoffsets.c | 108 GENOFFSET(AMD64,amd64,RDI);
|
| /external/valgrind/main/coregrind/m_sigframe/ |
| sigframe-amd64-linux.c | 353 SC2(rdi,RDI);
587 tst->arch.vex.guest_RDI = sc->rdi;
|
