/external/clang/test/Sema/ |
attr-availability.c | 50 void f8() { function
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varargs.c | 64 void f8(int a, ...) { function
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/external/clang/test/SemaCXX/ |
function-extern-c.cpp | 36 extern "C" double f8(void);
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/external/chromium_org/third_party/webrtc/modules/audio_processing/aec/ |
aec_core_mips.c | 339 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13; local 354 "mul.s %[f8], %[f0], %[f1] \n\t" 366 "sub.s %[f8], %[f8], %[f12] \n\t" 378 "nmsub.s %[f8], %[f8], %[f2], %[f3] \n\t" 387 "add.s %[f2], %[f2], %[f8] \n\t" 404 "mul.s %[f8], %[f0], %[f1] \n\t" 409 "sub.s %[f8], %[f8], %[f12] \n\t 456 float f0, f1, f2, f3, f4, f5, f6 ,f7, f8, f9, f10, f11, f12; local [all...] |
/external/chromium_org/v8/test/mjsunit/ |
bounds-checks-elimination.js | 53 test(function f8(b) {
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/external/clang/test/CodeGen/ |
regparm-struct.c | 67 __attribute__((regparm(3))) void f8(float a, int b); 68 // CHECK: declare void @f8(float, i32 inreg) 70 f8(41, 42);
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/external/llvm/test/MC/Mips/mips32r6/ |
invalid-mips32r2.s | 14 nmsub.d $f30,$f8,$f16,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips64r6/ |
invalid-mips4.s | 11 ldxc1 $f8,$s7($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/valgrind/main/coregrind/m_dispatch/ |
dispatch-s390x-linux.S | 95 /* Save fprs: ABI: f8...f15 */ 96 std %f8,160+0(SP) 155 ld %f8,160+0(SP)
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/external/chromium_org/third_party/mesa/src/src/mesa/sparc/ |
xform.S | 79 ld [%g1 + 0x00], %f8 ! LSU Group 86 fmuls %f8, M0, %f9 ! FGM Group f1 available 89 fmuls %f8, M1, %f10 ! FGM Group f2 available 92 fmuls %f8, M2, %f11 ! FGM Group f3 available 95 fmuls %f8, M3, %f12 ! FGM Group f4 available 194 ld [%g1 + 0x00], %f8 ! LSU Group 199 fmuls %f8, M0, %f9 ! FGM Group 200 fmuls %f8, M1, %f10 ! FGM Group 469 fmuls %f1, M6, %f8 ! FGM 476 fadds %f4, %f8, %f4 ! FGA Group f8 availabl [all...] |
sparc_clip.S | 109 fdivs %f4, %f3, %f8 ! FGM 143 fmuls %f0, %f8, %f0 ! FGM 145 fmuls %f1, %f8, %f1 ! FGM 147 fmuls %f2, %f8, %f2 ! FGM 149 st %f8, [%i5 + 0x0c] ! LSU Group
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/external/chromium_org/v8/test/mjsunit/compiler/ |
loopcount.js | 71 function f8() { function 77 assertEquals(0x40000002, f8());
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/external/chromium_org/v8/test/mjsunit/regress/ |
regress-clobbered-fp-regs.js | 38 var f8 = 0.8 * y; 40 var sum = (f1 + f2 + f3 + f4 + f5 + f6 + f7 + f8);
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/external/clang/test/Analysis/ |
array-struct.c | 79 void f8() { function
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/external/clang/test/CodeGenCXX/ |
aarch64-mangle-neon-vectors.cpp | 54 void f8(uint32x2_t) {} function
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mangle-ms-return-qualifiers.cpp | 161 int S::* f8() { return 0; } function in class:S 162 // CHECK: "\01?f8@@YAPQS@@HXZ"
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x86_32-arguments.cpp | 110 s8 f8() { return s8(); } function
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temp-order.cpp | 142 static unsigned f8() { function 201 print("f8", f8()); 202 if (f8() != ORDER2(5, 2))
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/external/llvm/test/MC/Mips/ |
mips-fpu-instructions.s | 11 # CHECK: add.d $f8, $f12, $f14 # encoding: [0x00,0x62,0x2e,0x46] 17 # CHECK: mul.d $f8, $f12, $f14 # encoding: [0x02,0x62,0x2e,0x46] 25 # CHECK: sub.d $f8, $f12, $f14 # encoding: [0x01,0x62,0x2e,0x46] 32 add.d $f8,$f12,$f14 38 mul.d $f8,$f12,$f14 46 sub.d $f8,$f12,$f14 149 # CHECK: mov.d $f6, $f8 # encoding: [0x86,0x41,0x20,0x46] 184 mov.d $f6,$f8
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/external/mesa3d/src/mesa/sparc/ |
xform.S | 79 ld [%g1 + 0x00], %f8 ! LSU Group 86 fmuls %f8, M0, %f9 ! FGM Group f1 available 89 fmuls %f8, M1, %f10 ! FGM Group f2 available 92 fmuls %f8, M2, %f11 ! FGM Group f3 available 95 fmuls %f8, M3, %f12 ! FGM Group f4 available 194 ld [%g1 + 0x00], %f8 ! LSU Group 199 fmuls %f8, M0, %f9 ! FGM Group 200 fmuls %f8, M1, %f10 ! FGM Group 469 fmuls %f1, M6, %f8 ! FGM 476 fadds %f4, %f8, %f4 ! FGA Group f8 availabl [all...] |
sparc_clip.S | 109 fdivs %f4, %f3, %f8 ! FGM 143 fmuls %f0, %f8, %f0 ! FGM 145 fmuls %f1, %f8, %f1 ! FGM 147 fmuls %f2, %f8, %f2 ! FGM 149 st %f8, [%i5 + 0x0c] ! LSU Group
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/external/chromium_org/third_party/openssl/openssl/crypto/bn/asm/ |
ia64.S | 303 { .mib; setf.sig f8=r35 // w 330 (p21) xmpy.lu f48=f37,f8 333 (p21) xmpy.hu f40=f37,f8 371 (p18) xma.hu f38=f34,f8,f39 } 373 (p18) xma.lu f35=f34,f8,f39 409 { .mib; setf.sig f8=r35 // w 435 (p20) xma.lu f42=f36,f8,f50 // low 438 (p20) xma.hu f36=f36,f8,f50 // high [all...] |
/external/openssl/crypto/bn/asm/ |
ia64.S | 303 { .mib; setf.sig f8=r35 // w 330 (p21) xmpy.lu f48=f37,f8 333 (p21) xmpy.hu f40=f37,f8 371 (p18) xma.hu f38=f34,f8,f39 } 373 (p18) xma.lu f35=f34,f8,f39 409 { .mib; setf.sig f8=r35 // w 435 (p20) xma.lu f42=f36,f8,f50 // low 438 (p20) xma.hu f36=f36,f8,f50 // high [all...] |
/external/llvm/test/MC/Mips/mips32r2/ |
valid.s | 10 add.s $f8,$f21,$f24 41 cvt.s.d $f26,$f8 55 floor.w.s $f8,$f9 63 ldxc1 $f8,$s7($15) 127 nmsub.d $f30,$f8,$f16,$f30
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/art/test/MyClassNatives/ |
MyClassNatives.java | 47 float f7, float f8, float f9); 86 float f7, float f8, float f9, float f10); 89 float f6, float f7, float f8, float f9, float f10, int i1, int i2, int i3, int i4, int i5, 93 float f4, int i5, float f5, int i6, float f6, int i7, float f7, int i8, float f8, int i9,
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