| /dalvik/dx/src/com/android/dx/rop/code/ |
| ThrowingInsn.java | 99 return new ThrowingInsn(getOpcode(), getPosition(),
106 return new ThrowingInsn(getOpcode(), getPosition(),
116 return new ThrowingInsn(getOpcode(), getPosition(),
|
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| ThrowingCstInsn.java | 84 return new ThrowingCstInsn(getOpcode(), getPosition(),
92 return new ThrowingCstInsn(getOpcode(), getPosition(),
103 return new ThrowingCstInsn(getOpcode(), getPosition(),
|
| ThrowingInsn.java | 99 return new ThrowingInsn(getOpcode(), getPosition(),
106 return new ThrowingInsn(getOpcode(), getPosition(),
116 return new ThrowingInsn(getOpcode(), getPosition(),
|
| /external/llvm/include/llvm/IR/ |
| Instruction.h | 85 /// getOpcode() returns a member of one of the enums like Instruction::Add.
86 unsigned getOpcode() const { return getValueID() - InstructionVal; }
88 const char *getOpcodeName() const { return getOpcodeName(getOpcode()); }
89 bool isTerminator() const { return isTerminator(getOpcode()); }
90 bool isBinaryOp() const { return isBinaryOp(getOpcode()); }
91 bool isShift() { return isShift(getOpcode()); }
92 bool isCast() const { return isCast(getOpcode()); }
112 return getOpcode() == Shl || getOpcode() == LShr;
117 return getOpcode() == AShr
[all...] |
| /external/llvm/lib/MC/ |
| MCInst.cpp | 43 OS << "<MCInst " << getOpcode();
54 OS << "<MCInst #" << getOpcode();
58 OS << ' ' << Printer->getOpcodeName(getOpcode());
|
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | 177 inline unsigned getOpcode() const;
397 /// getOpcode - Return the SelectionDAG opcode value for this node. For
401 unsigned getOpcode() const { return (unsigned short)NodeType; }
880 inline unsigned SDValue::getOpcode() const {
881 return Node->getOpcode();
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| DelaySlotFiller.cpp | 121 (MI->getOpcode() == SP::RESTORErr
122 || MI->getOpcode() == SP::RESTOREri)) {
128 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD
129 || MI->getOpcode() == SP::FCMPQ)) {
180 if (slot->getOpcode() == SP::RET || slot->getOpcode() == SP::TLS_CALL)
183 if (slot->getOpcode() == SP::RETL) {
187 if (J->getOpcode() == SP::RESTORErr
188 || J->getOpcode() == SP::RESTOREri)
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.cpp | 92 switch (MI.getOpcode()) {
136 if (MI->getOpcode() == NVPTX::INT_CUDA_SYNCTHREADS)
183 if (LastInst->getOpcode() == NVPTX::GOTO) {
186 } else if (LastInst->getOpcode() == NVPTX::CBranch) {
204 if (SecondLastInst->getOpcode() == NVPTX::CBranch &&
205 LastInst->getOpcode() == NVPTX::GOTO) {
214 if (SecondLastInst->getOpcode() == NVPTX::GOTO &&
215 LastInst->getOpcode() == NVPTX::GOTO) {
232 if (I->getOpcode() != NVPTX::GOTO && I->getOpcode() != NVPTX::CBranch
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64BranchRelaxation.cpp | 292 switch (MI->getOpcode()) {
345 assert(MI->getOpcode() == AArch64::Bcc && "Unexpected opcode!");
375 BMI->getOpcode() == AArch64::B) {
385 getBranchDisplacementBits(MI->getOpcode()))) {
389 unsigned OpNum = (MI->getOpcode() == AArch64::TBZW ||
390 MI->getOpcode() == AArch64::TBNZW ||
391 MI->getOpcode() == AArch64::TBZX ||
392 MI->getOpcode() == AArch64::TBNZX)
396 MI->setDesc(TII->get(getOppositeConditionOpcode(MI->getOpcode())));
397 if (MI->getOpcode() == AArch64::Bcc
[all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64ExternalSymbolizer.cpp | 91 } else if (MI.getOpcode() == AArch64::ADRP) {
104 } else if (MI.getOpcode() == AArch64::ADDXri ||
105 MI.getOpcode() == AArch64::LDRXui ||
106 MI.getOpcode() == AArch64::LDRXl ||
107 MI.getOpcode() == AArch64::ADR) {
108 if (MI.getOpcode() == AArch64::ADDXri)
110 else if (MI.getOpcode() == AArch64::LDRXui)
112 if (MI.getOpcode() == AArch64::LDRXl) {
116 } else if (MI.getOpcode() == AArch64::ADR) {
125 MI.getOpcode() == AArch64::ADDXri ? 0x91000000: 0xF9400000
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonSplitTFRCondSets.cpp | 94 switch(MI->getOpcode()) {
102 if (MI->getOpcode() == Hexagon::TFR_condset_rr ||
103 MI->getOpcode() == Hexagon::TFR_condset_rr_f) {
107 else if (MI->getOpcode() == Hexagon::TFR_condset_rr64_f) {
138 if (MI->getOpcode() == Hexagon::TFR_condset_ri ) {
143 } else if (MI->getOpcode() == Hexagon::TFR_condset_ri_f ) {
159 if (MI->getOpcode() == Hexagon::TFR_condset_ir ) {
164 } else if (MI->getOpcode() == Hexagon::TFR_condset_ir_f ) {
187 if (MI->getOpcode() == Hexagon::TFR_condset_ii ) {
196 } else if (MI->getOpcode() == Hexagon::TFR_condset_ii_f )
[all...] |
| HexagonCFGOptimizer.cpp | 77 switch(MI->getOpcode()) {
114 int Opc = MI->getOpcode();
166 if ((MI->getOpcode() == Hexagon::JMP_t) ||
167 (MI->getOpcode() == Hexagon::JMP_f)) {
179 IsUnconditionalJump(LayoutSucc->front().getOpcode())) {
186 IsUnconditionalJump(JumpAroundTarget->back().getOpcode()) &&
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineShifts.cpp | 108 switch (I->getOpcode()) {
203 switch (I->getOpcode()) {
316 bool isLeftShift = I.getOpcode() == Instruction::Shl;
331 if (I.getOpcode() != Instruction::AShr &&
349 if (BO->getOpcode() == Instruction::Mul && isLeftShift)
375 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
389 if (I.getOpcode() == Instruction::Shl)
392 assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
411 switch (Op0BO->getOpcode()) {
425 Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/builder/ |
| MutableMethodImplementation.java | 86 final Opcode opcode = instruction.getOpcode();
348 if (instruction.getOpcode() != Opcode.NOP) {
361 switch (instruction.getOpcode()) {
372 if (targetInstruction.getOpcode() == Opcode.NOP) {
381 targetInstruction.getOpcode() != Opcode.PACKED_SWITCH_PAYLOAD) ||
383 targetInstruction.getOpcode() != Opcode.SPARSE_SWITCH_PAYLOAD)) {
409 switch (instruction.getOpcode()) {
452 if (previousInstruction.getOpcode() == Opcode.NOP) {
510 switch (instruction.getOpcode().format) {
607 throw new ExceptionWithContext("Instruction format %s not supported", instruction.getOpcode().format)
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/analysis/ |
| AnalyzedInstruction.java | 113 assert originalInstruction.getOpcode().odexOnly();
118 assert originalInstruction.getOpcode().odexOnly();
231 if (instruction == null || !instruction.getOpcode().canInitializeReference()) {
246 return instruction.getOpcode().setsRegister();
250 return instruction.getOpcode().setsWideRegister();
301 if (!this.instruction.getOpcode().setsRegister()) {
|
| /dalvik/dexgen/src/com/android/dexgen/dex/code/ |
| SimpleInsn.java | 51 return new SimpleInsn(getOpcode(), getPosition(), registers);
|
| /dalvik/dx/src/com/android/dx/dex/code/ |
| SimpleInsn.java | 51 return new SimpleInsn(getOpcode(), getPosition(), registers);
|
| /dalvik/dx/src/com/android/dx/io/instructions/ |
| OneRegisterDecodedInstruction.java | 52 getFormat(), getOpcode(), newIndex, getIndexType(),
|
| RegisterRangeDecodedInstruction.java | 57 getFormat(), getOpcode(), newIndex, getIndexType(),
|
| TwoRegisterDecodedInstruction.java | 61 getFormat(), getOpcode(), newIndex, getIndexType(),
|
| /dalvik/dx/src/com/android/dx/merge/ |
| InstructionTransformer.java | 71 boolean isJumbo = (one.getOpcode() == Opcodes.CONST_STRING_JUMBO);
81 boolean isJumbo = (one.getOpcode() == Opcodes.CONST_STRING_JUMBO);
91 boolean isJumbo = (one.getOpcode() == Opcodes.CONST_STRING_JUMBO);
101 boolean isJumbo = (one.getOpcode() == Opcodes.CONST_STRING_JUMBO);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDILISelDAGToDAG.cpp | 103 if (Addr.getOpcode() == ISD::FrameIndex) {
111 } else if (Addr.getOpcode() == ISD::ADD) {
122 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
123 Addr.getOpcode() == ISD::TargetGlobalAddress) {
131 if (Addr.getOpcode() == ISD::TargetExternalSymbol ||
132 Addr.getOpcode() == ISD::TargetGlobalAddress) {
136 if (Addr.getOpcode() == ISD::FrameIndex) {
144 } else if (Addr.getOpcode() == ISD::ADD) {
155 unsigned int Opc = N->getOpcode();
320 if (Addr.getOpcode() == ISD::TargetExternalSymbol |
[all...] |
| R600ExpandSpecialInstrs.cpp | 63 bool IsReduction = TII->isReductionOp(MI.getOpcode());
65 bool IsCube = TII->isCubeOp(MI.getOpcode());
135 switch (MI.getOpcode()) {
148 Opcode = MI.getOpcode();
|
| /external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
| SimpleInsn.java | 51 return new SimpleInsn(getOpcode(), getPosition(), registers);
|
| /external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
| OneRegisterDecodedInstruction.java | 52 getFormat(), getOpcode(), newIndex, getIndexType(),
|
