| /external/llvm/lib/Target/AArch64/ |
| AArch64StorePairSuppress.cpp | 108 switch (MI.getOpcode()) {
|
| /external/llvm/lib/Target/ARM/ |
| ARMMCInstLower.cpp | 120 OutMI.setOpcode(MI->getOpcode());
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMCInstLower.cpp | 44 MCI.setOpcode(MI->getOpcode());
|
| HexagonHardwareLoops.cpp | 287 return MI->getOpcode() == Hexagon::LOOP0_r ||
288 MI->getOpcode() == Hexagon::LOOP0_i;
356 unsigned UpdOpc = DI->getOpcode();
502 unsigned CondOpc = CondI->getOpcode();
626 if (StartValInstr && StartValInstr->getOpcode() == Hexagon::TFRI)
631 if (EndValInstr && EndValInstr->getOpcode() == Hexagon::TFRI)
[all...] |
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCInst.cpp | 26 IS = II->beginStage(QII->get(this->getOpcode()).getSchedClass());
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430MCInstLower.cpp | 114 OutMI.setOpcode(MI->getOpcode());
|
| /external/llvm/lib/Target/Mips/ |
| Mips16RegisterInfo.cpp | 138 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
|
| MipsOs16.cpp | 66 switch (Inst.getOpcode()) {
|
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXFavorNonGenericAddrSpaces.cpp | 92 if (Cast->getOpcode() != Instruction::AddrSpaceCast)
|
| /external/llvm/lib/Target/XCore/ |
| XCoreMCInstLower.cpp | 108 OutMI.setOpcode(MI->getOpcode());
|
| XCoreRegisterInfo.cpp | 68 switch (MI.getOpcode()) {
104 switch (MI.getOpcode()) {
136 switch (MI.getOpcode()) {
168 unsigned OpCode = MI.getOpcode();
|
| XCoreISelLowering.cpp | 188 if (Val.getOpcode() != ISD::LOAD)
207 switch (Op.getOpcode())
242 switch (N->getOpcode()) {
563 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI &&
580 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::UMUL_LOHI &&
603 if (Op.getOpcode() != ISD::ADD)
609 if (N0.getOpcode() == ISD::ADD) {
612 } else if (N1.getOpcode() == ISD::ADD) {
620 if (OtherOp.getOpcode() == ISD::MUL) {
630 if (AddOp.getOperand(0).getOpcode() == ISD::MUL)
[all...] |
| /external/llvm/utils/TableGen/ |
| DAGISelMatcher.cpp | 385 return COM->getOpcode().getEnumName() != getOpcode().getEnumName();
393 if (CT->getResNo() >= getOpcode().getNumResults())
396 MVT::SimpleValueType NodeType = getOpcode().getKnownType(CT->getResNo());
|
| /frameworks/base/services/core/java/com/android/server/hdmi/ |
| DeviceSelectAction.java | 114 int opcode = cmd.getOpcode();
|
| HdmiCecMessage.java | 73 public int getOpcode() {
|
| NewDeviceAction.java | 88 int opcode = cmd.getOpcode();
|
| TimerRecordingAction.java | 107 switch (cmd.getOpcode()) {
|
| VolumeControlAction.java | 127 switch (cmd.getOpcode()) {
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | 98 if (N->getOpcode() == ISD::BITCAST)
101 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
106 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
136 N->getOperand(i).getOpcode() != ISD::UNDEF)
146 if (N->getOpcode() == ISD::BITCAST)
149 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
153 if (N->getOperand(i).getOpcode() == ISD::UNDEF)
185 if (N->getOpcode() != ISD::BUILD_VECTOR)
190 if (Op.getOpcode() == ISD::UNDEF)
202 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR
[all...] |
| LegalizeVectorOps.cpp | 199 if (Op.getOpcode() == ISD::LOAD) {
208 } else if (Op.getOpcode() == ISD::STORE) {
235 switch (Op.getOpcode()) {
311 switch (TLI.getOperationAction(Node->getOpcode(), QueryType)) {
345 switch (Op.getOpcode()) {
353 return PromoteFP_TO_INT(Op, Op->getOpcode() == ISD::FP_TO_SINT);
362 MVT NVT = TLI.getTypeToPromoteTo(Op.getOpcode(), VT);
373 Op = DAG.getNode(Op.getOpcode(), dl, NVT, Operands);
398 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND :
407 return DAG.getNode(Op.getOpcode(), dl, Op.getValueType(), Operands)
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCompares.cpp | [all...] |
| /external/llvm/lib/IR/ |
| ConstantFold.cpp | 87 Instruction::CastOps firstOp = Instruction::CastOps(Op->getOpcode());
221 switch (CE->getOpcode()) {
532 } else if (CE->getOpcode() == Instruction::GetElementPtr &&
614 if (CE->getOpcode() == Instruction::GetElementPtr &&
742 if (TrueVal->getOpcode() == Instruction::Select)
747 if (FalseVal->getOpcode() == Instruction::Select)
[all...] |
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 565 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
566 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
590 switch (MI.getOpcode()) {
630 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
631 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
667 const MCOperandInfo *OpInfo = ARMInsts[MI.getOpcode()].OpInfo;
669 unsigned short NumOps = ARMInsts[MI.getOpcode()].NumOperands;
[all...] |
| /external/smali/dexlib2/src/main/java/org/jf/dexlib2/analysis/ |
| MethodAnalyzer.java | 195 if (instructionToAnalyze.originalInstruction.getOpcode().odexOnly()) {
213 ex.addContext(String.format("opcode: %s", instructionToAnalyze.instruction.getOpcode().name));
250 if (instruction.getOpcode().odexOnly()) {
252 switch (instruction.getOpcode().format) {
412 Opcode instructionOpcode = instruction.instruction.getOpcode();
455 Opcode instructionOpcode = instruction.instruction.getOpcode();
458 if (instruction.instruction.getOpcode().canContinue()) {
502 if (!allowMoveException && successor.instruction.getOpcode() == Opcode.MOVE_EXCEPTION) {
503 throw new AnalysisException("Execution can pass from the " + predecessor.instruction.getOpcode().name +
526 assert successor.instruction.getOpcode().canThrow()
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 221 if (MI->getOpcode() != SystemZ::MVC ||
427 return (MI->getOpcode() == Opcode &&
447 if (RLL && RLL->getOpcode() == SystemZ::LGFR) {
459 if (!IPM || IPM->getOpcode() != SystemZ::IPM)
507 unsigned Opcode = MI->getOpcode();
539 unsigned Opcode = MI->getOpcode();
681 unsigned Opcode = MI->getOpcode();
753 unsigned Opcode = MI->getOpcode();
873 switch (MI->getOpcode()) {
[all...] |
