/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
RegisterRangeDecodedInstruction.java | 57 getFormat(), getOpcode(), newIndex, getIndexType(),
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TwoRegisterDecodedInstruction.java | 61 getFormat(), getOpcode(), newIndex, getIndexType(),
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/external/llvm/lib/Target/R600/ |
R600Packetizer.cpp | 76 if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle()) 90 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::write); 93 int DstIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::dst); 102 if (BI->getOpcode() == AMDGPU::DOT4_r600 || 103 BI->getOpcode() == AMDGPU::DOT4_eg) { 140 int OperandIdx = TII->getOperandIdx(MI->getOpcode(), Ops[i]); 175 if (!TII->isALUInstr(MI->getOpcode())) 177 if (MI->getOpcode() == AMDGPU::GROUP_BARRIER) 181 if (TII->isLDSInstr(MI->getOpcode())) 193 int OpI = TII->getOperandIdx(MII->getOpcode(), AMDGPU::OpName::pred_sel) [all...] |
AMDGPUInstrInfo.cpp | 92 switch (iter->getOpcode()) { 126 int OffsetOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), 131 int ChanOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), 134 int DstOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), 148 int ValOpIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), 150 AMDGPU::getNamedOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst); 270 return get(MI.getOpcode()).TSFlags & AMDGPU_FLAG_REGISTER_STORE; 274 return get(MI.getOpcode()).TSFlags & AMDGPU_FLAG_REGISTER_LOAD;
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILISelDAGToDAG.cpp | 103 if (Addr.getOpcode() == ISD::FrameIndex) { 111 } else if (Addr.getOpcode() == ISD::ADD) { 122 if (Addr.getOpcode() == ISD::TargetExternalSymbol || 123 Addr.getOpcode() == ISD::TargetGlobalAddress) { 131 if (Addr.getOpcode() == ISD::TargetExternalSymbol || 132 Addr.getOpcode() == ISD::TargetGlobalAddress) { 136 if (Addr.getOpcode() == ISD::FrameIndex) { 144 } else if (Addr.getOpcode() == ISD::ADD) { 155 unsigned int Opc = N->getOpcode(); 320 if (Addr.getOpcode() == ISD::TargetExternalSymbol | [all...] |
R600ExpandSpecialInstrs.cpp | 63 bool IsReduction = TII->isReductionOp(MI.getOpcode()); 65 bool IsCube = TII->isCubeOp(MI.getOpcode()); 135 switch (MI.getOpcode()) { 148 Opcode = MI.getOpcode();
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/external/smali/dexlib2/src/main/java/org/jf/dexlib2/immutable/instruction/ |
ImmutableInstruction10x.java | 51 return new ImmutableInstruction10x(instruction.getOpcode());
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/external/llvm/lib/Analysis/ |
CostModel.cpp | 173 unsigned Opcode = BinOp->getOpcode(); 220 else if (NextLevelBinOp->getOpcode() != Opcode) 284 Opcode = RdxStart->getOpcode(); 320 unsigned RdxOpcode = RdxStart->getOpcode(); 347 if (BinOp->getOpcode() != RdxOpcode) 384 switch (I->getOpcode()) { 393 return TTI->getCFInstrCost(I->getOpcode()); 417 return TTI->getArithmeticInstrCost(I->getOpcode(), I->getType(), Op1VK, 423 return TTI->getCmpSelInstrCost(I->getOpcode(), I->getType(), CondTy); 428 return TTI->getCmpSelInstrCost(I->getOpcode(), ValTy) [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | 453 if (Op.getOpcode() == ISD::FNEG) return 2; 461 switch (Op.getOpcode()) { 515 if (Op.getOpcode() == ISD::FNEG) return Op.getOperand(0); 521 switch (Op.getOpcode()) { 566 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 572 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 579 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 597 if (N.getOpcode() == ISD::SETCC) { 604 if (N.getOpcode() != ISD::SELECT_CC || 675 if (N0.getOpcode() == Opc) [all...] |
/external/llvm/lib/Transforms/Utils/ |
IntegerDivision.cpp | 377 assert((Rem->getOpcode() == Instruction::SRem || 378 Rem->getOpcode() == Instruction::URem) && 393 if (Rem->getOpcode() == Instruction::SRem) { 403 if (!BO || BO->getOpcode() != Instruction::URem) 419 assert(UDiv->getOpcode() == Instruction::UDiv && "Non-udiv in expansion?"); 435 assert((Div->getOpcode() == Instruction::SDiv || 436 Div->getOpcode() == Instruction::UDiv) && 451 if (Div->getOpcode() == Instruction::SDiv) { 461 if (!BO || BO->getOpcode() != Instruction::UDiv) 486 assert((Rem->getOpcode() == Instruction::SRem | [all...] |
/dalvik/dexgen/src/com/android/dexgen/dex/code/ |
TargetInsn.java | 61 return new TargetInsn(getOpcode(), getPosition(), registers, target); 75 Dop opcode = getOpcode().getOppositeTest();
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/dalvik/dexgen/src/com/android/dexgen/rop/code/ |
FillArrayDataInsn.java | 103 return new FillArrayDataInsn(getOpcode(), getPosition(), 113 return new FillArrayDataInsn(getOpcode(), getPosition(),
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PlainCstInsn.java | 70 return new PlainCstInsn(getOpcode(), getPosition(), 81 return new PlainCstInsn(getOpcode(), getPosition(),
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SwitchInsn.java | 83 return new SwitchInsn(getOpcode(), getPosition(), 105 return new SwitchInsn(getOpcode(), getPosition(),
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/dalvik/dx/src/com/android/dx/dex/code/ |
TargetInsn.java | 61 return new TargetInsn(getOpcode(), getPosition(), registers, target); 75 Dop opcode = getOpcode().getOppositeTest();
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/dalvik/dx/src/com/android/dx/rop/code/ |
FillArrayDataInsn.java | 102 return new FillArrayDataInsn(getOpcode(), getPosition(), 112 return new FillArrayDataInsn(getOpcode(), getPosition(),
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PlainCstInsn.java | 70 return new PlainCstInsn(getOpcode(), getPosition(), 81 return new PlainCstInsn(getOpcode(), getPosition(),
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SwitchInsn.java | 83 return new SwitchInsn(getOpcode(), getPosition(), 105 return new SwitchInsn(getOpcode(), getPosition(),
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDGPUMCInstLower.cpp | 31 OutMI.setOpcode(MI->getOpcode()); 62 if (MI->getOpcode() == AMDGPU::MASK_WRITE) {
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/external/clang/lib/StaticAnalyzer/Checkers/ |
PointerArithChecker.cpp | 36 if (B->getOpcode() != BO_Sub && B->getOpcode() != BO_Add)
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/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
TargetInsn.java | 61 return new TargetInsn(getOpcode(), getPosition(), registers, target); 75 Dop opcode = getOpcode().getOppositeTest();
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/external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
FillArrayDataInsn.java | 103 return new FillArrayDataInsn(getOpcode(), getPosition(), 113 return new FillArrayDataInsn(getOpcode(), getPosition(),
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PlainCstInsn.java | 70 return new PlainCstInsn(getOpcode(), getPosition(), 81 return new PlainCstInsn(getOpcode(), getPosition(),
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SwitchInsn.java | 83 return new SwitchInsn(getOpcode(), getPosition(), 105 return new SwitchInsn(getOpcode(), getPosition(),
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/external/llvm/lib/Target/NVPTX/ |
NVPTXutil.cpp | 22 if ((MI->getOpcode() != NVPTX::LD_i32_avar) && 23 (MI->getOpcode() != NVPTX::LD_i64_avar))
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