/external/mesa3d/src/gallium/drivers/radeon/ |
AMDGPUMCInstLower.cpp | 31 OutMI.setOpcode(MI->getOpcode()); 62 if (MI->getOpcode() == AMDGPU::MASK_WRITE) {
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R600InstrInfo.cpp | 40 return get(MI.getOpcode()).TSFlags & R600_InstFlag::TRIG; 45 return get(MI.getOpcode()).TSFlags & R600_InstFlag::VECTOR; 169 if (isPredicateSetter(MI->getOpcode())) 195 if (static_cast<MachineInstr *>(I)->getOpcode() != AMDGPU::JUMP) { 203 unsigned LastOpc = LastInst->getOpcode(); 205 static_cast<MachineInstr *>(--I)->getOpcode() != AMDGPU::JUMP) { 212 while (!isPredicateSetter(predSet->getOpcode())) { 227 unsigned SecondLastOpc = SecondLastInst->getOpcode(); 235 while (!isPredicateSetter(predSet->getOpcode())) { 310 switch (I->getOpcode()) { [all...] |
/external/smali/dexlib2/src/test/java/org/jf/dexlib2/writer/ |
JumboStringConversionTest.java | 110 Assert.assertEquals(Opcode.CONST_STRING, instructions.get(i).getOpcode()); 115 Assert.assertEquals(Opcode.CONST_STRING_JUMBO, instructions.get(i).getOpcode()); 119 Assert.assertEquals(Opcode.RETURN_VOID, instructions.get(66000).getOpcode()); 142 @Override public Opcode getOpcode() { 147 return getOpcode().format.size / 2; 207 Assert.assertEquals(Opcode.CONST_STRING, actualInstructions.get(i).getOpcode()); 212 Assert.assertEquals(Opcode.CONST_STRING_JUMBO, actualInstructions.get(i).getOpcode()); 216 Assert.assertEquals(Opcode.RETURN_VOID, actualInstructions.get(66000).getOpcode());
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600InstrInfo.cpp | 40 return get(MI.getOpcode()).TSFlags & R600_InstFlag::TRIG; 45 return get(MI.getOpcode()).TSFlags & R600_InstFlag::VECTOR; 169 if (isPredicateSetter(MI->getOpcode())) 195 if (static_cast<MachineInstr *>(I)->getOpcode() != AMDGPU::JUMP) { 203 unsigned LastOpc = LastInst->getOpcode(); 205 static_cast<MachineInstr *>(--I)->getOpcode() != AMDGPU::JUMP) { 212 while (!isPredicateSetter(predSet->getOpcode())) { 227 unsigned SecondLastOpc = SecondLastInst->getOpcode(); 235 while (!isPredicateSetter(predSet->getOpcode())) { 310 switch (I->getOpcode()) { [all...] |
AMDGPUInstrInfo.cpp | 88 switch (iter->getOpcode()) { 106 if (tmp->getOpcode() == AMDGPU::ENDLOOP 107 || tmp->getOpcode() == AMDGPU::ENDIF 108 || tmp->getOpcode() == AMDGPU::ELSE) {
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/external/llvm/lib/Target/MSP430/ |
MSP430InstrInfo.cpp | 115 if (I->getOpcode() != MSP430::JMP && 116 I->getOpcode() != MSP430::JCC && 117 I->getOpcode() != MSP430::Br && 118 I->getOpcode() != MSP430::Bm) 196 if (I->getOpcode() == MSP430::Br || 197 I->getOpcode() == MSP430::Bm) 201 if (I->getOpcode() == MSP430::JMP) { 227 assert(I->getOpcode() == MSP430::JCC && "Invalid conditional branch"); 300 switch (Desc.getOpcode()) { 316 switch (MI->getOpcode()) { [all...] |
/external/llvm/lib/Target/R600/ |
R600InstrInfo.cpp | 41 return get(MI.getOpcode()).TSFlags & R600_InstFlag::TRIG; 45 return get(MI.getOpcode()).TSFlags & R600_InstFlag::VECTOR; 168 if (isALUInstr(MI->getOpcode())) 170 if (isVector(*MI) || isCubeOp(MI->getOpcode())) 172 switch (MI->getOpcode()) { 192 return isTransOnly(MI->getOpcode()); 200 return isVectorOnly(MI->getOpcode()); 213 return MFI->ShaderType != ShaderType::COMPUTE && usesVertexCache(MI->getOpcode()); 222 return (MFI->ShaderType == ShaderType::COMPUTE && usesVertexCache(MI->getOpcode())) || 223 usesTextureCache(MI->getOpcode()); [all...] |
R600ExpandSpecialInstrs.cpp | 81 if (TII->isLDSRetInstr(MI.getOpcode())) { 82 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst); 88 int LDSPredSelIdx = TII->getOperandIdx(MI.getOpcode(), 90 int MovPredSelIdx = TII->getOperandIdx(Mov->getOpcode(), 97 switch (MI.getOpcode()) { 218 unsigned Opcode = BMI->getOpcode(); 238 bool IsReduction = TII->isReductionOp(MI.getOpcode()); 240 bool IsCube = TII->isCubeOp(MI.getOpcode()); 314 unsigned Opcode = MI.getOpcode();
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/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.cpp | 65 int Opcode = MI->getOpcode(); 87 int Opcode = MI->getOpcode(); 216 if (IsBRU(LastInst->getOpcode())) { 221 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); 242 unsigned SecondLastOpc = SecondLastInst->getOpcode(); 248 && IsBRU(LastInst->getOpcode())) { 260 if (IsBRU(SecondLastInst->getOpcode()) && 261 IsBRU(LastInst->getOpcode())) { 270 if (IsBR_JT(SecondLastInst->getOpcode()) && IsBRU(LastInst->getOpcode())) { [all...] |
/external/llvm/lib/Target/R600/MCTargetDesc/ |
R600MCCodeEmitter.cpp | 92 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 93 if (MI.getOpcode() == AMDGPU::RETURN || 94 MI.getOpcode() == AMDGPU::FETCH_CLAUSE || 95 MI.getOpcode() == AMDGPU::ALU_CLAUSE || 96 MI.getOpcode() == AMDGPU::BUNDLE || 97 MI.getOpcode() == AMDGPU::KILL) { 175 if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags))
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/external/llvm/lib/Target/Mips/ |
Mips16ISelDAGToDAG.cpp | 131 switch (Parent->getOpcode()) { 176 if (Addr.getOpcode() == MipsISD::Wrapper) { 182 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || 183 Addr.getOpcode() == ISD::TargetGlobalAddress)) 205 if (Addr.getOpcode() == ISD::ADD) { 214 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo || 215 Addr.getOperand(1).getOpcode() == MipsISD::GPRel) { 243 unsigned Opcode = Node->getOpcode(); 259 unsigned Opc = InFlag.getOpcode(); (void)Opc;
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/external/llvm/lib/Target/PowerPC/ |
PPCCodeEmitter.cpp | 122 switch (MI.getOpcode()) { 148 assert((MI.getOpcode() == PPC::MTOCRF || MI.getOpcode() == PPC::MTOCRF8 || 149 MI.getOpcode() == PPC::MFOCRF || MI.getOpcode() == PPC::MFOCRF8) && 282 assert((MI.getOpcode() != PPC::MTOCRF && MI.getOpcode() != PPC::MTOCRF8 && 283 MI.getOpcode() != PPC::MFOCRF && MI.getOpcode() != PPC::MFOCRF8) ||
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PPCInstrInfo.cpp | 162 switch (MI.getOpcode()) { 176 switch (MI->getOpcode()) { 202 switch (MI->getOpcode()) { 232 if (MI->getOpcode() != PPC::RLWIMI && 233 MI->getOpcode() != PPC::RLWIMIo && 234 MI->getOpcode() != PPC::RLWIMI8 && 235 MI->getOpcode() != PPC::RLWIMI8o) 308 int AltOpc = PPC::getAltVSXFMAOpcode(MI->getOpcode()); 361 if (LastInst->getOpcode() == PPC::B) { 366 } else if (LastInst->getOpcode() == PPC::BCC) [all...] |
/external/llvm/lib/Target/ARM/ |
ARMHazardRecognizer.cpp | 26 unsigned Opcode = MCID.getOpcode(); 65 if (TII.isFpMLxInstruction(DefMI->getOpcode()) && 66 (TII.canCauseFpMLxStall(MI->getOpcode()) ||
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/dalvik/dexgen/src/com/android/dexgen/dex/code/ |
RopTranslator.java | 185 if (insn.getOpcode().getOpcode()== RegOps.MOVE_PARAM) { 276 Rop lastRop = lastInsn.getOpcode(); 464 if (insn.getOpcode().isCommutative() 524 Rop rop = insn.getOpcode(); 525 if (rop.getOpcode() == RegOps.MARK_LOCAL) { 532 if (rop.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) { 574 Rop rop = insn.getOpcode(); 575 int ropOpcode = rop.getOpcode(); 671 if (insn.getOpcode().getOpcode() != RegOps.MOVE_RESULT_PSEUDO) [all...] |
/dalvik/dx/src/com/android/dx/dex/code/ |
RopTranslator.java | 191 if (insn.getOpcode().getOpcode()== RegOps.MOVE_PARAM) { 282 Rop lastRop = lastInsn.getOpcode(); 470 if (insn.getOpcode().isCommutative() 530 Rop rop = insn.getOpcode(); 531 if (rop.getOpcode() == RegOps.MARK_LOCAL) { 538 if (rop.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) { 580 Rop rop = insn.getOpcode(); 581 int ropOpcode = rop.getOpcode(); 680 if (insn.getOpcode().getOpcode() != RegOps.MOVE_RESULT_PSEUDO) [all...] |
/external/dexmaker/src/dx/java/com/android/dx/dex/code/ |
RopTranslator.java | 192 if (insn.getOpcode().getOpcode()== RegOps.MOVE_PARAM) { 283 Rop lastRop = lastInsn.getOpcode(); 471 if (insn.getOpcode().isCommutative() 531 Rop rop = insn.getOpcode(); 532 if (rop.getOpcode() == RegOps.MARK_LOCAL) { 539 if (rop.getOpcode() == RegOps.MOVE_RESULT_PSEUDO) { 581 Rop rop = insn.getOpcode(); 582 int ropOpcode = rop.getOpcode(); 678 if (insn.getOpcode().getOpcode() != RegOps.MOVE_RESULT_PSEUDO) [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 268 /// getOpcode - Returns the opcode of this MachineInstr. 270 int getOpcode() const { return MCID->Opcode; } 681 bool isEHLabel() const { return getOpcode() == TargetOpcode::EH_LABEL; } 682 bool isGCLabel() const { return getOpcode() == TargetOpcode::GC_LABEL; } 688 return getOpcode() == TargetOpcode::CFI_INSTRUCTION; 694 bool isDebugValue() const { return getOpcode() == TargetOpcode::DBG_VALUE; } 703 bool isPHI() const { return getOpcode() == TargetOpcode::PHI; } 704 bool isKill() const { return getOpcode() == TargetOpcode::KILL; } 705 bool isImplicitDef() const { return getOpcode()==TargetOpcode::IMPLICIT_DEF; } 706 bool isInlineAsm() const { return getOpcode() == TargetOpcode::INLINEASM; [all...] |
/dalvik/dx/src/com/android/dx/io/instructions/ |
FiveRegisterDecodedInstruction.java | 88 getFormat(), getOpcode(), newIndex, getIndexType(),
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FourRegisterDecodedInstruction.java | 79 getFormat(), getOpcode(), newIndex, getIndexType(),
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ThreeRegisterDecodedInstruction.java | 70 getFormat(), getOpcode(), newIndex, getIndexType(),
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/external/clang/lib/StaticAnalyzer/Checkers/ |
FixedAddressChecker.cpp | 40 if (B->getOpcode() != BO_Assign)
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/external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
FiveRegisterDecodedInstruction.java | 88 getFormat(), getOpcode(), newIndex, getIndexType(),
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FourRegisterDecodedInstruction.java | 79 getFormat(), getOpcode(), newIndex, getIndexType(),
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ThreeRegisterDecodedInstruction.java | 70 getFormat(), getOpcode(), newIndex, getIndexType(),
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