/external/llvm/test/MC/Mips/mips64r6/ |
invalid-mips3.s | 8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 dmult $s7,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 mfhi $s3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 mfhi $sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 16 mflo $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 17 mthi $s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable [all...] |
invalid-mips5.s | 8 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 suxc1 $f12,$k1($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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invalid-mips4.s | 8 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 ldxc1 $f8,$s7($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 sdxc1 $f11,$10($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 swxc1 $f19,$12($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/ARM/ |
udf-arm-diagnostics.s | 10 @ CHECK: error: instruction 'udf' is not predicable, but condition code specified 16 @ CHECK: error: invalid operand for instruction
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basic-arm-instructions-v8.s | 11 @ CHECK-V7: error: instruction requires: armv8 12 @ CHECK-V7: error: instruction requires: armv8 17 @ CHECK-V7: error: instruction requires: armv8 31 @ CHECK-V7: error: invalid operand for instruction 32 @ CHECK-V7: error: invalid operand for instruction 33 @ CHECK-V7: error: invalid operand for instruction 34 @ CHECK-V7: error: invalid operand for instruction 48 @ CHECK-V7: error: invalid operand for instruction 49 @ CHECK-V7: error: invalid operand for instruction 50 @ CHECK-V7: error: invalid operand for instruction [all...] |
crc32-thumb.s | 11 @ CHECK-V7: error: instruction requires: crc armv8 12 @ CHECK-V7: error: instruction requires: crc armv8 13 @ CHECK-V7: error: instruction requires: crc armv8 14 @ CHECK-NOCRC: error: instruction requires: crc 15 @ CHECK-NOCRC: error: instruction requires: crc 16 @ CHECK-NOCRC: error: instruction requires: crc 25 @ CHECK-V7: error: instruction requires: crc armv8 26 @ CHECK-V7: error: instruction requires: crc armv8 27 @ CHECK-V7: error: instruction requires: crc armv8 28 @ CHECK-NOCRC: error: instruction requires: cr [all...] |
crc32.s | 11 @ CHECK-V7: error: instruction requires: crc armv8 12 @ CHECK-V7: error: instruction requires: crc armv8 13 @ CHECK-V7: error: instruction requires: crc armv8 14 @ CHECK-NOCRC: error: instruction requires: crc 15 @ CHECK-NOCRC: error: instruction requires: crc 16 @ CHECK-NOCRC: error: instruction requires: crc 25 @ CHECK-V7: error: instruction requires: crc armv8 26 @ CHECK-V7: error: instruction requires: crc armv8 27 @ CHECK-V7: error: instruction requires: crc armv8 28 @ CHECK-NOCRC: error: instruction requires: cr [all...] |
vorr-vbic-illegal-cases.s | 4 @ CHECK: error: invalid operand for instruction 6 @ CHECK: error: invalid operand for instruction 8 @ CHECK: error: invalid operand for instruction 10 @ CHECK: error: invalid operand for instruction 12 @ CHECK: error: invalid operand for instruction 14 @ CHECK: error: invalid operand for instruction 17 @ CHECK: error: invalid operand for instruction 19 @ CHECK: error: invalid operand for instruction 21 @ CHECK: error: invalid operand for instruction 23 @ CHECK: error: invalid operand for instruction [all...] |
neon-crypto.s | 12 @ CHECK-V7: instruction requires: crypto armv8 13 @ CHECK-V7: instruction requires: crypto armv8 14 @ CHECK-V7: instruction requires: crypto armv8 15 @ CHECK-V7: instruction requires: crypto armv8 23 @ CHECK-V7: instruction requires: crypto armv8 24 @ CHECK-V7: instruction requires: crypto armv8 25 @ CHECK-V7: instruction requires: crypto armv8 41 @ CHECK-V7: instruction requires: crypto armv8 42 @ CHECK-V7: instruction requires: crypto armv8 43 @ CHECK-V7: instruction requires: crypto armv [all...] |
load-store-acquire-release-v8-thumb.s | 12 @ CHECK-V7: error: instruction requires: armv8 13 @ CHECK-V7: error: instruction requires: armv8 14 @ CHECK-V7: error: instruction requires: armv8 15 @ CHECK-V7: error: instruction requires: armv8 25 @ CHECK-V7: error: instruction requires: armv8 26 @ CHECK-V7: error: instruction requires: armv8 27 @ CHECK-V7: error: instruction requires: armv8 28 @ CHECK-V7: error: instruction requires: armv8 36 @ CHECK-V7: error: instruction requires: armv8 37 @ CHECK-V7: error: instruction requires: armv [all...] |
load-store-acquire-release-v8.s | 12 @ CHECK-V7: instruction requires: armv8 13 @ CHECK-V7: instruction requires: armv8 14 @ CHECK-V7: instruction requires: armv8 15 @ CHECK-V7: instruction requires: armv8 25 @ CHECK-V7: instruction requires: armv8 26 @ CHECK-V7: instruction requires: armv8 27 @ CHECK-V7: instruction requires: armv8 28 @ CHECK-V7: instruction requires: armv8 36 @ CHECK-V7: instruction requires: armv8 37 @ CHECK-V7: instruction requires: armv [all...] |
basic-thumb2-instructions-v8.s | 11 @ CHECK-V7: error: instruction requires: armv8 12 @ CHECK-V7: error: instruction requires: armv8 20 @ CHECK-V7: error: instruction requires: armv8 25 @ CHECK-V7: error: instruction requires: armv8 34 @ CHECK-V7: error: instruction requires: armv8 35 @ CHECK-V7: error: instruction requires: armv8 36 @ CHECK-V7: error: instruction requires: armv8 50 @ CHECK-V7: error: invalid operand for instruction 51 @ CHECK-V7: error: invalid operand for instruction 52 @ CHECK-V7: error: invalid operand for instruction [all...] |
/external/llvm/test/MC/Mips/mips32r6/ |
invalid-mips4.s | 8 ldxc1 $f8,$s7($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 sdxc1 $f11,$10($14) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 swxc1 $f19,$12($k0) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips4/ |
invalid-mips64.s | 9 clo $t3,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 clz $sp,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 11 dclo $s2,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 12 dclz $s0,$t9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 13 deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 14 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 15 madd $s6,$t5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 16 madd $zero,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 17 maddu $s3,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 18 maddu $t8,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enable [all...] |
/external/llvm/test/MC/PowerPC/ |
ppc64-errors.s | 9 # CHECK: error: invalid operand for instruction 19 # CHECK: error: invalid operand for instruction 23 # CHECK: error: invalid operand for instruction 29 # CHECK: error: invalid operand for instruction 33 # CHECK: error: invalid operand for instruction 39 # CHECK: error: invalid operand for instruction 43 # CHECK: error: invalid operand for instruction 49 # CHECK: error: invalid operand for instruction 52 # CHECK: error: invalid operand for instruction 65 # CHECK: error: invalid operand for instruction [all...] |
/external/smali/dexlib2/src/main/java/org/jf/dexlib2/dexbacked/instruction/ |
DexBackedInstruction10x.java | 32 package org.jf.dexlib2.dexbacked.instruction; 36 import org.jf.dexlib2.iface.instruction.formats.Instruction10x;
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/external/smali/baksmali/src/main/java/org/jf/baksmali/Adaptors/Format/ |
ArrayDataMethodItem.java | 33 import org.jf.dexlib2.iface.instruction.formats.ArrayPayload; 40 public ArrayDataMethodItem(MethodDefinition methodDef, int codeAddress, ArrayPayload instruction) { 41 super(methodDef, codeAddress, instruction); 45 int elementWidth = instruction.getElementWidth(); 48 writer.printSignedIntAsDec(instruction.getElementWidth()); 53 List<Number> elements = instruction.getArrayElements();
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OffsetInstructionFormatMethodItem.java | 35 import org.jf.dexlib2.iface.instruction.OffsetInstruction; 45 int codeAddress, OffsetInstruction instruction) { 46 super(methodDef, codeAddress, instruction); 48 label = new LabelMethodItem(options, codeAddress + instruction.getCodeOffset(), getLabelPrefix()); 62 Opcode opcode = instruction.getOpcode();
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/art/compiler/sea_ir/debug/ |
dot_gen.cc | 44 void DotGenerationVisitor::ToDotSSAEdges(InstructionNode* instruction) { 45 std::map<int, InstructionNode*>* definition_edges = instruction->GetSSAProducersMap(); 52 dot_text_ += instruction->StringId() + "[color=gray,label=\""; 67 std::vector<InstructionNode*>* used_in = instruction->GetSSAConsumers(); 70 dot_text_ += (*cit)->StringId() + " -> " + instruction->StringId() + "[color=gray,label=\""; 76 void DotGenerationVisitor::ToDotSSAEdges(PhiInstructionNode* instruction) { 77 std::vector<InstructionNode*> definition_edges = instruction->GetSSAProducers(); 84 dot_text_ += instruction->StringId() + "[color=gray,label=\""; 85 dot_text_ += art::StringPrintf("vR = %d", instruction->GetRegisterNumber()); 99 std::vector<InstructionNode*>* used_in = instruction->GetSSAConsumers() [all...] |
/external/smali/dexlib2/src/main/java/org/jf/dexlib2/analysis/ |
MethodAnalyzer.java | 40 import org.jf.dexlib2.iface.instruction.*; 41 import org.jf.dexlib2.iface.instruction.formats.*; 46 import org.jf.dexlib2.immutable.instruction.*; 80 // This contains all the AnalyzedInstruction instances, keyed by the code unit address of the instruction 84 // Which instructions have been analyzed, keyed by instruction index 89 //This is a dummy instruction that occurs immediately before the first real instruction. We can initialize the 90 //register types for this instruction to the parameter types, in order to have them propagate to all of its 91 //successors, e.g. the first real instruction, the first instructions in any exception handlers covering the first 92 //instruction, etc 248 Instruction instruction = analyzedInstruction.getInstruction(); local [all...] |
/art/compiler/optimizing/ |
ssa_type_propagation.cc | 35 // Re-compute and update the type of the instruction. Returns 77 HPhi* instruction = worklist_.Pop(); local 78 if (UpdateType(instruction)) { 79 AddDependentInstructionsToWorklist(instruction); 84 void SsaTypePropagation::AddToWorklist(HPhi* instruction) { 85 worklist_.Add(instruction); 88 void SsaTypePropagation::AddDependentInstructionsToWorklist(HPhi* instruction) { 89 for (HUseIterator<HInstruction> it(instruction->GetUses()); !it.Done(); it.Advance()) {
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/external/smali/baksmali/src/main/java/org/jf/baksmali/Adaptors/ |
PreInstructionRegisterInfoMethodItem.java | 35 import org.jf.dexlib2.iface.instruction.*; 109 RegisterRangeInstruction instruction = (RegisterRangeInstruction)analyzedInstruction.getInstruction(); local 111 registers.set(instruction.getStartRegister(), 112 instruction.getStartRegister() + instruction.getRegisterCount()); 114 FiveRegisterInstruction instruction = (FiveRegisterInstruction)analyzedInstruction.getInstruction(); local 115 int regCount = instruction.getRegisterCount(); 118 registers.set(instruction.getRegisterG()); 121 registers.set(instruction.getRegisterF()); 124 registers.set(instruction.getRegisterE()) 133 ThreeRegisterInstruction instruction = (ThreeRegisterInstruction)analyzedInstruction.getInstruction(); local 138 TwoRegisterInstruction instruction = (TwoRegisterInstruction)analyzedInstruction.getInstruction(); local 142 OneRegisterInstruction instruction = (OneRegisterInstruction)analyzedInstruction.getInstruction(); local [all...] |
/external/llvm/test/MC/SystemZ/ |
regs-bad.s | 6 #CHECK: error: invalid operand for instruction 8 #CHECK: error: invalid operand for instruction 10 #CHECK: error: invalid operand for instruction 12 #CHECK: error: invalid operand for instruction 14 #CHECK: error: invalid operand for instruction 16 #CHECK: error: invalid operand for instruction 28 #CHECK: error: invalid operand for instruction 30 #CHECK: error: invalid operand for instruction 32 #CHECK: error: invalid operand for instruction 34 #CHECK: error: invalid operand for instruction [all...] |
tokens.s | 4 #CHECK: error: invalid instruction 8 #CHECK: error: invalid instruction 14 #CHECK: error: invalid instruction 26 #CHECK: error: invalid instruction 30 #CHECK: error: invalid instruction 32 #CHECK: error: invalid instruction 36 #CHECK: error: invalid instruction 38 #CHECK: error: invalid instruction 42 #CHECK: error: invalid instruction 44 #CHECK: error: invalid instruction [all...] |
/external/proguard/src/proguard/optimize/evaluation/ |
EvaluationSimplifier.java | 27 import proguard.classfile.instruction.*; 28 import proguard.classfile.instruction.visitor.InstructionVisitor; 148 Instruction instruction = InstructionFactory.create(codeAttribute.code, local 151 instruction.accept(clazz, method, codeAttribute, offset, this); 373 * Replaces the push instruction at the given offset by a simpler push 374 * instruction, if possible. 378 Instruction instruction) 386 replaceIntegerPushInstruction(clazz, offset, instruction); [all...] |