| /external/valgrind/main/VEX/priv/ |
| host_mips_isel.c | 400 HReg argregs[MIPS_N_REGPARMS]; local
455 argregs[0] = hregMIPS_GPR4(mode64);
456 argregs[1] = hregMIPS_GPR5(mode64);
457 argregs[2] = hregMIPS_GPR6(mode64);
458 argregs[3] = hregMIPS_GPR7(mode64);
459 argregs[4] = hregMIPS_GPR8(mode64);
460 argregs[5] = hregMIPS_GPR9(mode64);
461 argregs[6] = hregMIPS_GPR10(mode64);
462 argregs[7] = hregMIPS_GPR11(mode64);
468 argregs[0] = hregMIPS_GPR4(mode64)
[all...] |
| host_ppc_isel.c | 691 HReg argregs[PPC_N_REGPARMS]; local
785 argregs[0] = hregPPC_GPR3(mode64);
786 argregs[1] = hregPPC_GPR4(mode64);
787 argregs[2] = hregPPC_GPR5(mode64);
788 argregs[3] = hregPPC_GPR6(mode64);
789 argregs[4] = hregPPC_GPR7(mode64);
790 argregs[5] = hregPPC_GPR8(mode64);
791 argregs[6] = hregPPC_GPR9(mode64);
792 argregs[7] = hregPPC_GPR10(mode64);
855 addInstr(env, mk_iMOVds_RR( argregs[argreg]
2185 HReg argregs[1]; local
2214 HReg argregs[1]; local
3549 HReg argregs[2]; local
3589 HReg argregs[2]; local
[all...] |
| host_arm_isel.c | 395 HReg argregs[ARM_N_ARGREGS]; local
481 argregs[0] = hregARM_R0();
482 argregs[1] = hregARM_R1();
483 argregs[2] = hregARM_R2();
484 argregs[3] = hregARM_R3();
537 return False; /* out of argregs */
540 addInstr(env, mk_iMOVds_RR( argregs[nextArgReg],
551 return False; /* out of argregs */
552 addInstr(env, ARMInstr_Imm32( argregs[nextArgReg], 0xAA ));
556 return False; /* out of argregs */
[all...] |
| host_amd64_isel.c | 436 HReg argregs[6]; local
517 argregs[0] = hregAMD64_RDI();
518 argregs[1] = hregAMD64_RSI();
519 argregs[2] = hregAMD64_RDX();
520 argregs[3] = hregAMD64_RCX();
521 argregs[4] = hregAMD64_R8();
522 argregs[5] = hregAMD64_R9();
572 = iselIntExpr_single_instruction( env, argregs[i], args[i] );
651 addInstr( env, mk_iMOVsd_RR( tmpregs[i], argregs[i] ) );
[all...] |
| host_x86_isel.c | 435 HReg argregs[3]; local
556 argregs[0] = hregX86_EAX();
557 argregs[1] = hregX86_EDX();
558 argregs[2] = hregX86_ECX();
602 addInstr( env, mk_iMOVsd_RR( tmpregs[argregX], argregs[argregX] ) );
616 argregs[argreg]));
624 argregs[argreg]));
[all...] |
| host_arm64_isel.c | 514 HReg argregs[ARM64_N_ARGREGS]; local
618 argregs[0] = hregARM64_X0();
619 argregs[1] = hregARM64_X1();
620 argregs[2] = hregARM64_X2();
621 argregs[3] = hregARM64_X3();
622 argregs[4] = hregARM64_X4();
623 argregs[5] = hregARM64_X5();
624 argregs[6] = hregARM64_X6();
625 argregs[7] = hregARM64_X7();
678 return False; /* out of argregs */
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 139 SmallVectorImpl<unsigned> &ArgRegs,
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 200 SmallVectorImpl<unsigned> &ArgRegs,
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | 168 SmallVectorImpl<unsigned> &ArgRegs,
[all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 495 // Store remaining ArgRegs to the stack if this is a varargs function.
497 static const MCPhysReg ArgRegs[] = {
500 unsigned NumAllocated = CCInfo.getFirstUnallocated(ArgRegs, 6);
501 const MCPhysReg *CurArgReg = ArgRegs+NumAllocated, *ArgRegEnd = ArgRegs+6;
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| /external/chromium_org/base/third_party/valgrind/ |
| valgrind.h | [all...] |
| /external/chromium_org/third_party/re2/util/ |
| valgrind.h | [all...] |
| /external/chromium_org/third_party/tcmalloc/vendor/src/third_party/ |
| valgrind.h | [all...] |
| /external/regex-re2/util/ |
| valgrind.h | [all...] |
| /external/chromium_org/v8/src/third_party/valgrind/ |
| valgrind.h | [all...] |
| /external/valgrind/main/include/ |
| valgrind.h | [all...] |
