| /external/llvm/test/MC/Mips/ |
| micromips-bad-branches.s | 112 # CHECK: bc1t -65535
114 # CHECK: bc1t -65537
116 # CHECK: bc1t 65535
118 # CHECK: bc1t 65536
121 # CHECK: bc1t $fcc0, -65535
123 # CHECK: bc1t $fcc0, -65537
125 # CHECK: bc1t $fcc0, 65535
127 # CHECK: bc1t $fcc0, 65536
213 bc1t -65535
214 bc1t -6553
[all...] |
| mips-bad-branches.s | 208 # CHECK: bc1t -131069
210 # CHECK: bc1t -131070
212 # CHECK: bc1t -131071
214 # CHECK: bc1t -131073
216 # CHECK: bc1t 131069
218 # CHECK: bc1t 131070
220 # CHECK: bc1t 131071
222 # CHECK: bc1t 131072
225 # CHECK: bc1t $fcc0, -131069
227 # CHECK: bc1t $fcc0, -13107
[all...] |
| mips-jump-instructions.s | 15 # CHECK32: bc1t 1332 # encoding: [0x4d,0x01,0x01,0x45]
40 # CHECK64: bc1t 1332 # encoding: [0x4d,0x01,0x01,0x45]
67 bc1t 1332
|
| /external/llvm/test/MC/Mips/mips1/ |
| valid.s | 18 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
19 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/valgrind/main/none/tests/mips32/ |
| fpu_branches.stdout.exp | 50 --- BC1T --- if fs == ft then out = fs else out = fs + ft
51 bc1t, c.eq.s out=-4578.500000, fs=0.000000, ft=-4578.500000
52 bc1t, c.eq.d out=-45786.500000, fs=0.000000, ft=-45786.500000
53 bc1t, c.eq.s out=456.250000, fs=456.250000, ft=456.250000
54 bc1t, c.eq.d out=456.250000, fs=456.250000, ft=456.250000
55 bc1t, c.eq.s out=37.031250, fs=3.000000, ft=34.031250
56 bc1t, c.eq.d out=37.031250, fs=3.000000, ft=34.031250
57 bc1t, c.eq.s out=4577.750000, fs=-1.000000, ft=4578.750000
58 bc1t, c.eq.d out=45785.750000, fs=-1.000000, ft=45786.750000
59 bc1t, c.eq.s out=1559.500000, fs=1384.500000, ft=175.00000
[all...] |
| fpu_branches.c | 183 printf("--- BC1T --- if fs == ft then " \
186 TESTINST1s("bc1t", i);
187 TESTINST1d("bc1t", i);
|
| /external/valgrind/main/none/tests/mips64/ |
| fpu_branches.stdout.exp | 50 --- BC1T --- if fs != ft then out = fs + ft else out = ft
51 bc1t, c.eq.s out=-4578.500000, fs=0.000000, ft=-4578.500000
52 bc1t, c.eq.d out=-45786.500000, fs=0.000000, ft=-45786.500000
53 bc1t, c.eq.s out=456.250000, fs=456.250000, ft=456.250000
54 bc1t, c.eq.d out=456.250000, fs=456.250000, ft=456.250000
55 bc1t, c.eq.s out=37.031250, fs=3.000000, ft=34.031250
56 bc1t, c.eq.d out=37.031250, fs=3.000000, ft=34.031250
57 bc1t, c.eq.s out=4577.750000, fs=-1.000000, ft=4578.750000
58 bc1t, c.eq.d out=45785.750000, fs=-1.000000, ft=45786.750000
59 bc1t, c.eq.s out=1559.500000, fs=1384.500000, ft=175.00000
[all...] |
| fpu_branches.c | 15 printf("--- BC1T --- if fs != ft then " \
18 TESTINST1s("bc1t", i);
19 TESTINST1d("bc1t", i);
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 19 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
20 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
21 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 19 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
20 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
21 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 18 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
19 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| invalid-mips32.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 291 case Mips::BC1T:
292 // bc1t $fcc0, $L1 => bc1t $L1
293 return isReg<Mips::FCC0>(MI, 0) && printAlias("bc1t", MI, 1, OS);
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 18 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
19 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| invalid-mips4.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| invalid-mips5.s | 9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| /external/llvm/test/MC/Mips/mips4/ |
| valid.s | 19 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
20 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
21 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips5/ |
| valid.s | 19 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
20 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
21 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64/ |
| valid.s | 19 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
20 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
21 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 19 bc1t $fcc0, 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
20 bc1t $fcc1, 4 # CHECK: bc1t $fcc1, 4 # encoding: [0x45,0x05,0x00,0x01]
21 bc1t 4 # CHECK: bc1t 4 # encoding: [0x45,0x01,0x00,0x01]
|
| /external/llvm/test/CodeGen/Mips/ |
| fpbr.ll | 77 ; FCC: bc1t $BB2_2
165 ; FCC: bc1t $BB5_2
|
| /external/llvm/lib/Target/Mips/ |
| MicroMipsInstrFPU.td | 42 def BC1T_MM : MMRel, BC1F_FT<"bc1t", brtarget_mm, IIBranch, MIPS_BRANCH_T>,
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32.txt | 41 # CHECK: bc1t 1332
44 # CHECK: bc1t $fcc7, 1332
|
| mips32_le.txt | 41 # CHECK: bc1t 1332
44 # CHECK: bc1t $fcc7, 1332
|
| mips32r2.txt | 41 # CHECK: bc1t 1332
44 # CHECK: bc1t $fcc7, 1332
|
