| /external/llvm/test/MC/Mips/ |
| micromips-bad-branches.s | 85 # CHECK: bltzal $1, -65535
87 # CHECK: bltzal $1, -65537
89 # CHECK: bltzal $1, 65535
91 # CHECK: bltzal $1, 65536
192 bltzal $1, -65535
193 bltzal $1, -65536
194 bltzal $1, -65537
195 bltzal $1, 65534
196 bltzal $1, 65535
197 bltzal $1, 6553
[all...] |
| mips-bad-branches.s | 157 # CHECK: bltzal $1, -131069
159 # CHECK: bltzal $1, -131070
161 # CHECK: bltzal $1, -131071
163 # CHECK: bltzal $1, -131073
165 # CHECK: bltzal $1, 131069
167 # CHECK: bltzal $1, 131070
169 # CHECK: bltzal $1, 131071
171 # CHECK: bltzal $1, 131072
351 bltzal $1, -131068
352 bltzal $1, -13106
[all...] |
| micromips-branch-instructions.s | 20 # CHECK-EL: bltzal $6, 1332 # encoding: [0x26,0x40,0x9a,0x02]
43 # CHECK-EB: bltzal $6, 1332 # encoding: [0x40,0x26,0x02,0x9a]
60 bltzal $6,1332
|
| micromips-branch16.s | 42 # CHECK-FIXUP: bltzal $4, bar # encoding: [0x24'A',0x40'A',0x00,0x00]
69 bltzal $4, bar
|
| nacl-mask.s | 243 bltzal $t1, func3
269 # CHECK-NEXT: bltzal
|
| /external/valgrind/main/none/tests/mips64/ |
| branch_and_jump_instructions.c | 305 printf("--- BLTZAL --- if RSval < 0 then " \
307 TEST5("bltzal", 0, 0, 2, 3);
308 TEST5("bltzal", 1, 1, 3, 4);
309 TEST5("bltzal", 2, 0xffffffff, 4, 5);
310 TEST5("bltzal", 3, 0xffffffff, 5, 6);
311 TEST5("bltzal", 4, 0xfffffffe, 6, 7);
312 TEST5("bltzal", 5, 0xffffffff, 7, 8);
313 TEST5("bltzal", 6, 0x5, 8, 9);
314 TEST5("bltzal", 7, -3, 9, 10);
315 TEST5("bltzal", 8, 125, 10, 11)
[all...] |
| branches.c | 506 printf("--- BLTZAL --- if RSval < 0 then " \
508 TESTINST6("bltzal", 0, 0, 2, 3);
509 TESTINST6("bltzal", 1, 1, 3, 4);
510 TESTINST6("bltzal", 2, 0xffffffff, 4, 5);
511 TESTINST6("bltzal", 3, 0xffffffff, 5, 6);
512 TESTINST6("bltzal", 4, 0xfffffffe, 6, 8);
513 TESTINST6("bltzal", 5, 0xffffffff, 7, 8);
514 TESTINST6("bltzal", 6, 0x5, 8, 9);
515 TESTINST6("bltzal", 7, -3, 9, 10);
516 TESTINST6("bltzal", 8, 125, 10, 11)
[all...] |
| branches.stdout.exp | 212 --- BLTZAL --- if RSval < 0 then out = RDval + 6 else out = RDval + 5
213 bltzal :: out: 5, RDval: 0, RSval: 0
214 bltzal :: out: 6, RDval: 1, RSval: 1
215 bltzal :: out: 8, RDval: 2, RSval: -1
216 bltzal :: out: 9, RDval: 3, RSval: -1
217 bltzal :: out: 10, RDval: 4, RSval: -2
218 bltzal :: out: 11, RDval: 5, RSval: -1
219 bltzal :: out: 11, RDval: 6, RSval: 5
220 bltzal :: out: 13, RDval: 7, RSval: -3
221 bltzal :: out: 13, RDval: 8, RSval: 12
[all...] |
| branch_and_jump_instructions.stdout.exp | 617 --- BLTZAL --- if RSval < 0 then out = RDval + 1 else out = RDval + 6
618 bltzal :: out: 0x5, RSval: 0x0
619 bltzal :: out: 0x6, RSval: 0x1
620 bltzal :: out: 0x8, RSval: 0xffffffff
621 bltzal :: out: 0x9, RSval: 0xffffffff
622 bltzal :: out: 0xa, RSval: 0xfffffffe
623 bltzal :: out: 0xb, RSval: 0xffffffff
624 bltzal :: out: 0xb, RSval: 0x5
625 bltzal :: out: 0xd, RSval: 0xfffffffffffffffd
626 bltzal :: out: 0xd, RSval: 0x7
[all...] |
| /external/valgrind/main/none/tests/mips32/ |
| branches.c | 468 printf("BLTZAL\n");
469 TESTINST6("bltzal", 0, 0, v0, v1);
470 TESTINST6("bltzal", 1, 1, v1, a0);
471 TESTINST6("bltzal", 2, 0xffffffff, a0, a1);
472 TESTINST6("bltzal", 3, 0xffffffff, a1, a2);
473 TESTINST6("bltzal", 4, 0xfffffffe, a2, t0);
474 TESTINST6("bltzal", 5, 0xffffffff, a3, t0);
475 TESTINST6("bltzal", 6, 0x5, t0, t1);
476 TESTINST6("bltzal", 7, -3, t1, t2);
477 TESTINST6("bltzal", 8, 125, t2, t3)
[all...] |
| branches.stdout.exp | 212 BLTZAL
213 bltzal :: 5, RSval: 0
214 bltzal :: 6, RSval: 1
215 bltzal :: 8, RSval: -1
216 bltzal :: 9, RSval: -1
217 bltzal :: 10, RSval: -2
218 bltzal :: 11, RSval: -1
219 bltzal :: 11, RSval: 5
220 bltzal :: 13, RSval: -3
221 bltzal :: 13, RSval: 12
[all...] |
| /external/llvm/test/MC/Mips/mips64r6/ |
| invalid-mips4.s | 10 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips5.s | 10 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips1.s | 11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips2.s | 11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips3.s | 11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| invalid-mips64.s | 11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/chromium_org/v8/src/mips/ |
| constants-mips.cc | 149 case BLTZAL:
179 case BLTZAL:
|
| /external/llvm/test/MC/Mips/mips1/ |
| valid.s | 23 bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
|
| /external/llvm/test/MC/Mips/mips2/ |
| valid.s | 23 bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
|
| /external/llvm/test/MC/Mips/mips3/ |
| valid.s | 23 bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
|
| /external/llvm/test/MC/Mips/mips32/ |
| valid.s | 25 bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 25 bltzal $6, 21100 # CHECK: bltzal $6, 21100 # encoding: [0x04,0xd0,0x14,0x9b]
|
| /art/disassembler/ |
| disassembler_mips.cc | 114 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (16 << 16), "bltzal", "SB" },
|
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsNaClELFStreamer.cpp | 77 case Mips::BLTZAL:
|
