/external/qemu/target-mips/ |
translate.c | 1204 TCGv_i32 fp0 = tcg_temp_new_i32(); local 1215 TCGv_i32 fp0 = tcg_temp_new_i32(); local 1228 TCGv_i64 fp0 = tcg_temp_new_i64(); local 1238 TCGv_i64 fp0 = tcg_temp_new_i64(); local 5360 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5366 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5525 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5531 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5808 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5820 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5852 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5864 TCGv_i32 fp0 = tcg_temp_new_i32(); local 5935 TCGv_i64 fp0; local 6026 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6041 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6056 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6071 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6086 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6097 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6108 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6118 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6185 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6196 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6207 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6218 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6234 TCGv_i32 fp0; local 6250 TCGv_i32 fp0; local 6266 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6278 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6290 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6305 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6317 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6329 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6357 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6414 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6434 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6450 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6466 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6482 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6498 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6510 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6522 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6533 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6545 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6557 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6569 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6581 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6653 TCGv_i64 fp0; local 6669 TCGv_i64 fp0; local 6685 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6697 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6709 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6724 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6736 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6748 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6777 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6827 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6838 TCGv_i32 fp0 = tcg_temp_new_i32(); local 6878 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6890 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6902 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6917 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6932 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6947 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6959 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6970 TCGv_i64 fp0 = tcg_temp_new_i64(); local 6988 TCGv_i64 fp0; local 7004 TCGv_i64 fp0; local 7020 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7035 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7050 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7065 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7077 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7089 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7104 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7116 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7128 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7140 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7155 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7170 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7185 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7215 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7272 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7285 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7297 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7308 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7324 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7337 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7399 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7418 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7436 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7454 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7473 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7491 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7509 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7528 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7546 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7564 TCGv_i32 fp0 = tcg_temp_new_i32(); local 7583 TCGv_i64 fp0 = tcg_temp_new_i64(); local 7601 TCGv_i64 fp0 = tcg_temp_new_i64(); local [all...] |
/external/clang/test/CXX/over/over.over/ |
p4.cpp | 7 int (*fp0)(int) = f0; 18 int (*fp0)(int) = f0; // expected-error{{address of overloaded function 'f0' is ambiguous}}
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/external/llvm/test/CodeGen/PowerPC/ |
2006-08-11-RetVector.ll | 4 define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) { 5 %tmp76 = shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>> [#uses=1]
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/external/llvm/test/CodeGen/X86/ |
vec_shuffle-20.ll | 4 define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) nounwind { 6 shufflevector <4 x float> %fp0, <4 x float> %fp1, <4 x i32> < i32 0, i32 1, i32 2, i32 7 > ; <<4 x float>>:0 [#uses=1]
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2010-05-12-FastAllocKills.ll | 11 ; FP_REG_KILL %FP0<imp-def>, %FP1<imp-def>, %FP2<imp-def>, %FP3<imp-def>, %FP4<imp-def>, %FP5<imp-def>, %FP6<imp-def> 15 ; The X86FP pass needs good kill flags, like on %FP0 representing %reg1034: 18 ; %FP0<def> = LD_Fp80m <fi#3>, 1, %reg0, 0, %reg0; mem:LD10[FixedStack3](align=4) 19 ; %FP1<def> = MOV_Fp8080 %FP0<kill> 21 ; %FP0<def> = MOV_Fp8080 %FP2 22 ; ST_FpP80m <fi#3>, 1, %reg0, 0, %reg0, %FP0<kill>; mem:ST10[FixedStack3](align=4) 25 ; FP_REG_KILL %FP0<imp-def>, %FP1<imp-def>, %FP2<imp-def>, %FP3<imp-def>, %FP4<imp-def>, %FP5<imp-def>, %FP6<imp-def>
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fp-stack-O0-crash.ll | 33 ; This produces a FP0 = IMPLICIT_DEF instruction.
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/external/clang/test/Sema/ |
attr-noreturn.c | 3 static void (*fp0)(void) __attribute__((noreturn)); variable
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attr-unused.c | 3 static void (*fp0)(void) __attribute__((unused)); variable
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/external/qemu/distrib/sdl-1.2.15/src/timer/mint/ |
SDL_vbltimer.S | 48 fmovemd fp0-fp7,sp@ 51 fmovemd sp@,fp0-fp7; \ 63 fmovemx fp0-fp7,sp@-; \ 68 fmovemx sp@+,fp0-fp7; \
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/external/qemu/gdb-xml/ |
cf-fp.xml | 9 <reg name="fp0" bitsize="64" type="float" group="float"/>
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/external/qemu/distrib/sdl-1.2.15/src/audio/mint/ |
SDL_mintaudio_it.S | 67 fmovemd fp0-fp7,sp@ 70 fmovemd sp@,fp0-fp7; \ 82 fmovemx fp0-fp7,sp@-; \ 87 fmovemx sp@+,fp0-fp7; \
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/external/chromium_org/third_party/skia/samplecode/ |
SampleWarp.cpp | 351 fP0.set(0, 0); 352 fP1 = fP0; 428 fP0 = p0; 449 // test_drag(canvas, fBitmap, fP0, fP1); 466 SkPoint fP0, fP1;
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/external/skia/samplecode/ |
SampleWarp.cpp | 351 fP0.set(0, 0); 352 fP1 = fP0; 428 fP0 = p0; 449 // test_drag(canvas, fBitmap, fP0, fP1); 466 SkPoint fP0, fP1;
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/external/clang/test/SemaTemplate/ |
temp_arg_nontype.cpp | 119 extern FuncPtr0<&func0> *fp0; 121 extern FuncPtr0<&func0> *fp0; 123 extern FuncPtr0<&func0> *fp0;
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/external/llvm/lib/Target/X86/ |
X86FloatingPoint.cpp | 90 // Bit mask of live FP registers. Bit 0 = FP0, bit 1 = FP1, &c. 120 if (Reg < X86::FP0 || Reg > X86::FP6) 122 Mask |= 1 << (Reg - X86::FP0); 144 // The first entries correspond to FP0-FP6, the rest are scratch registers 334 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); 335 return Reg - X86::FP0; 346 assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!"); 348 if (MF.getRegInfo().isPhysRegUsed(X86::FP0+i)) { 465 if (Reg >= X86::FP0 && Reg <= X86::FP6) { 466 DEBUG(dbgs() << "Register FP#" << Reg-X86::FP0 << " is dead!\n") [all...] |
X86RegisterInfo.td | 162 def FP0 : X86Reg<"fp0", 0>; 252 def ST7 : STRegister<"st(7)", 7, [FP0]>, DwarfRegNum<[40, 19, 18]>;
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/external/pixman/pixman/ |
loongson-mmintrin.h | 185 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \ 186 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0))
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/external/lldb/tools/debugserver/source/MacOSX/ppc/ |
DNBArchImpl.cpp | 305 { "fp0" , IEEE754, 8, Float }, 500 if (reg < 33) // FP0 - FP31 and VSCR
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/external/llvm/docs/TableGen/ |
index.rst | 64 ECX, EDI, EDX, EFLAGS, EIP, ESI, ESP, FP0, FP1, FP2, FP3, FP4, FP5, FP6, IP,
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/prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.8/lib/gcc/x86_64-linux-android/4.8/include/ |
emmintrin.h | 50 #define _MM_SHUFFLE2(fp1,fp0) \ 51 (((fp1) << 1) | (fp0)) [all...] |
xmmintrin.h | 48 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \ 49 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0)) [all...] |
/prebuilts/gcc/darwin-x86/x86/x86_64-linux-android-4.9/lib/gcc/x86_64-linux-android/4.9/include/ |
emmintrin.h | 52 #define _MM_SHUFFLE2(fp1,fp0) \ 53 (((fp1) << 1) | (fp0)) [all...] |
xmmintrin.h | 75 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \ 76 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0)) [all...] |
/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.11-4.6/lib/gcc/x86_64-linux/4.6/include/ |
emmintrin.h | 51 #define _MM_SHUFFLE2(fp1,fp0) \ 52 (((fp1) << 1) | (fp0)) [all...] |
xmmintrin.h | 49 #define _MM_SHUFFLE(fp3,fp2,fp1,fp0) \ 50 (((fp3) << 6) | ((fp2) << 4) | ((fp1) << 2) | (fp0)) [all...] |