| /external/chromium_org/v8/src/arm64/ |
| assembler-arm64-inl.h | 1015 Instr Assembler::ImmCondBranch(int imm19) {
1016 CHECK(is_int19(imm19));
1017 return truncate_to_int19(imm19) << ImmCondBranch_offset;
1021 Instr Assembler::ImmCmpBranch(int imm19) {
1022 CHECK(is_int19(imm19));
1023 return truncate_to_int19(imm19) << ImmCmpBranch_offset;
1094 Instr Assembler::ImmLLiteral(int imm19) {
1095 CHECK(is_int19(imm19));
1096 return truncate_to_int19(imm19) << ImmLLiteral_offset;
[all...] |
| assembler-arm64.cc | 760 void Assembler::b(int imm19, Condition cond) {
761 Emit(B_cond | ImmCondBranch(imm19) | cond);
784 int imm19) {
786 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt));
798 int imm19) {
800 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt));
[all...] |
| assembler-arm64.h | [all...] |
| regexp-macro-assembler-arm64.cc | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.td | 600 def CC : F2_3<0b001, 0, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond),
601 !strconcat("b$cond ", !strconcat(regstr, ", $imm19")),
603 def CCA : F2_3<0b001, 1, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond),
604 !strconcat("b$cond,a ", !strconcat(regstr, ", $imm19")),
606 def CCNT : F2_3<0b001, 0, 0, (outs), (ins bprtarget:$imm19, CCOp:$cond),
607 !strconcat("b$cond,pn ", !strconcat(regstr, ", $imm19")),
609 def CCANT : F2_3<0b001, 1, 0, (outs), (ins bprtarget:$imm19, CCOp:$cond),
610 !strconcat("b$cond,a,pn ", !strconcat(regstr, ", $imm19")),
655 def CC : F2_3<0b101, 0, 1, (outs), (ins bprtarget:$imm19, CCOp:$cond,
657 "fb$cond $cc, $imm19", []>;
[all...] |
| SparcInstrFormats.td | 68 bits<19> imm19;
77 let Inst{18-0} = imm19;
|
| SparcInstr64Bit.td | 311 defm BPX : IPredBranch<"%xcc", [(SPbrxcc bb:$imm19, imm:$cond)]>;
|
| /external/vixl/src/a64/ |
| assembler-a64.h | 694 void b(int imm19, Condition cond);
706 void cbz(const Register& rt, int imm19);
712 void cbnz(const Register& rt, int imm19);
[all...] |
| assembler-a64.cc | 454 void Assembler::b(int imm19, Condition cond) {
455 Emit(B_cond | ImmCondBranch(imm19) | cond);
480 int imm19) {
481 Emit(SF(rt) | CBZ | ImmCmpBranch(imm19) | Rt(rt));
492 int imm19) {
493 Emit(SF(rt) | CBNZ | ImmCmpBranch(imm19) | Rt(rt));
[all...] |
| /external/vixl/doc/ |
| supported-instructions.md | 98 void b(int imm19, Condition cond)
209 void cbnz(const Register& rt, int imm19)
223 void cbz(const Register& rt, int imm19)
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MachObjectWriter.cpp | 142 // imm19 relocations are for conditional branches, which require
|
| /external/valgrind/main/VEX/priv/ |
| guest_arm64_toIR.c | 3430 UInt imm19 = INSN(23,5); local
4125 UInt imm19 = INSN(23,5); local
[all...] |
| /external/valgrind/main/none/tests/arm64/ |
| fp_and_simd.c | [all...] |
