| /external/llvm/test/CodeGen/PowerPC/ |
| load-constant-addr.ll | 1 ; Should fold the ori into the lfs.
3 ; RUN: llc < %s -march=ppc32 | not grep ori
|
| and-imm.ll | 1 ; RUN: llc < %s -march=ppc32 | not grep "ori\|lis"
|
| 2010-02-12-saveCR.ll | 13 ; CHECK: ori [[T2]], [[T2]], 34540
17 ; CHECK: ori [[T3]], [[T3]], 34536
29 ; CHECK: ori [[T1]], [[T1]], 34536
34 ; CHECK: ori [[T1]], [[T1]], 34540
|
| Frames-large.ll | 18 ; PPC32-NOFP: ori r0, r0, 32736
28 ; PPC32-FP: ori r0, r0, 32736
39 ; PPC64-NOFP: ori r0, r0, 32720
49 ; PPC64-FP: ori r0, r0, 32704
|
| pwr7-gt-nop.ll | 21 ; CHECK: ori 2, 2, 0
24 ; CHECK: ori 2, 2, 0
|
| constants.ll | 5 ; RUN: grep ori | count 3
|
| /external/llvm/test/MC/Mips/ |
| mips64-expansions.s | 9 # CHECK: ori $12, $zero, 1 # encoding: [0x01,0x00,0x0c,0x34]
10 # CHECK: ori $12, $zero, 10 # encoding: [0x0a,0x00,0x0c,0x34]
11 # CHECK: ori $12, $zero, 100 # encoding: [0x64,0x00,0x0c,0x34]
12 # CHECK: ori $12, $zero, 1000 # encoding: [0xe8,0x03,0x0c,0x34]
13 # CHECK: ori $12, $zero, 10000 # encoding: [0x10,0x27,0x0c,0x34]
15 # CHECK: ori $12, $12, 34464 # encoding: [0xa0,0x86,0x8c,0x35]
17 # CHECK: ori $12, $12, 16960 # encoding: [0x40,0x42,0x8c,0x35]
19 # CHECK: ori $12, $12, 38528 # encoding: [0x80,0x96,0x8c,0x35]
21 # CHECK: ori $12, $12, 57600 # encoding: [0x00,0xe1,0x8c,0x35]
23 # CHECK: ori $12, $12, 51712 # encoding: [0x00,0xca,0x8c,0x35
[all...] |
| /external/llvm/test/CodeGen/Mips/ |
| imm.ll | 7 ; CHECK: ori ${{[0-9]+}}, $[[R0]], 22136
15 ; CHECK-NOT: ori
36 ; CHECK: ori ${{[0-9]+}}, $zero, 33332
|
| addc.ll | 7 ; CHECK: ori
|
| i64arg.ll | 9 ; CHECK-DAG: ori $6, ${{[0-9]+}}, 3855
10 ; CHECK-DAG: ori $7, ${{[0-9]+}}, 22136
|
| mips64imm.ll | 8 ; CHECK-NOT: ori
23 ; CHECK: ori ${{[0-9]+}}, $zero, 33332
|
| 2008-08-03-fabs64.ll | 3 ; DISABLED: grep {ori.*65535} %t | count 1
|
| /external/valgrind/main/none/tests/mips64/ |
| logical_instructions.c | 7 OR, ORI, XOR, XORI
68 case ORI:
70 TEST2("ori $t0, $t1, 0xff", reg_val1[i], 0xff, t0, t1);
71 TEST2("ori $t2, $t3, 0xffff", reg_val1[i], 0xffff, t2, t3);
72 TEST2("ori $a0, $a1, 0x0", reg_val1[i], 0x0, a0, a1);
73 TEST2("ori $s0, $s1, 0x23", reg_val1[i], 0x23, s0, s1);
74 TEST2("ori $t0, $t1, 0xff", reg_val2[i], 0xff, t0, t1);
75 TEST2("ori $t2, $t3, 0xffff", reg_val2[i], 0xffff, t2, t3);
76 TEST2("ori $a0, $a1, 0x0", reg_val2[i], 0x0, a0, a1);
77 TEST2("ori $s0, $s1, 0x23", reg_val2[i], 0x23, s0, s1)
[all...] |
| /external/chromium_org/third_party/webrtc/common_audio/signal_processing/ |
| spl_sqrt_floor_mips.c | 70 "ori %[tmp4], %[root], 0x8000 \n\t"
79 "ori %[tmp4], %[root], 0x4000 \n\t"
88 "ori %[tmp4], %[root], 0x2000 \n\t"
97 "ori %[tmp4], %[root], 0x1000 \n\t"
106 "ori %[tmp4], %[root], 0x800 \n\t"
115 "ori %[tmp4], %[root], 0x400 \n\t"
124 "ori %[tmp4], %[root], 0x200 \n\t"
133 "ori %[tmp4], %[root], 0x100 \n\t"
142 "ori %[tmp4], %[root], 0x80 \n\t"
151 "ori %[tmp4], %[root], 0x40 \n\t
[all...] |
| /external/chromium_org/chrome/browser/browsing_data/ |
| browsing_data_database_helper.cc | 75 for (std::vector<webkit_database::OriginInfo>::const_iterator ori =
76 origins_info.begin(); ori != origins_info.end(); ++ori) {
78 DatabaseIdentifier::Parse(ori->GetOriginIdentifier());
84 ori->GetAllDatabaseNames(&databases);
88 tracker_->GetFullDBFilePath(ori->GetOriginIdentifier(), *db);
94 base::UTF16ToUTF8(ori->GetDatabaseDescription(*db)),
|
| /external/valgrind/main/memcheck/tests/ppc32/ |
| power_ISA2_05.c | 113 __asm__ volatile ("ori 20, %0, 0"::"r" (base));
114 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
125 __asm__ volatile ("ori 20, %0, 0"::"r" (base));
126 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
179 __asm__ volatile ("ori 20, %0, 0"::"r" (base));
180 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
186 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
|
| /external/valgrind/main/memcheck/tests/ppc64/ |
| power_ISA2_05.c | 112 __asm__ volatile ("ori 20, %0, 0"::"r" (base));
113 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
124 __asm__ volatile ("ori 20, %0, 0"::"r" (base));
125 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
178 __asm__ volatile ("ori 20, %0, 0"::"r" (base));
179 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
185 __asm__ volatile ("ori 21, %0, 0"::"r" (offset));
|
| /external/llvm/test/CodeGen/Mips/Fast-ISel/ |
| simplestorefp1.ll | 14 ; CHECK: ori $[[REG2:[0-9]+]], $[[REG1]], 46662
28 ; CHECK: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353
30 ; CHECK: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951
|
| simplestorei.ll | 34 ; CHECK: ori $[[REG1:[0-9]+]], $zero, 65535
57 ; CHECK: ori $[[REG1]], $[[REG1]], 64206
|
| /external/llvm/test/MC/PowerPC/ |
| ppc64-errors.s | 40 # CHECK-NEXT: ori 1, 2, -1
41 ori 1, 2, -1
44 # CHECK-NEXT: ori 1, 2, 65536
45 ori 1, 2, 65536
|
| /external/llvm/test/MC/Mips/msa/ |
| test_i8.s | 8 # CHECK: ori.b $w26, $w20, 135 # encoding: [0x79,0x87,0xa6,0x80]
19 ori.b $w26, $w20, 135
|
| /external/llvm/lib/Target/Mips/ |
| MipsAnalyzeImmediate.cpp | 38 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL));
71 // instruction is an ADDiu or ORi. In that case, do not call GetInstSeqLsORi.
131 ORi = Mips::ORi;
136 ORi = Mips::ORi64;
|
| MipsAnalyzeImmediate.h | 39 /// GetInstSeqLsORi - Get instrutcion sequences which end with an ORi to
58 unsigned ADDiu, ORi, SLL, LUi;
|
| /external/flac/libFLAC/ppc/as/ |
| lpc_asm.s | 72 ori r31,r31,lo16(0xfffffc00)
119 ori r31,r31,lo16(L1307)
133 ori r31,r31,lo16(L1306)
147 ori r31,r31,lo16(L1305)
161 ori r31,r31,lo16(L1304)
175 ori r31,r31,lo16(L1303)
189 ori r31,r31,lo16(L1302)
203 ori r31,r31,lo16(L1301)
215 ori r31,r31,lo16(L1300)
321 ori r31,r31,lo16(0xffc00000
[all...] |
| /external/llvm/test/CodeGen/Mips/msa/ |
| frameindex.ll | 56 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
60 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
75 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
79 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
159 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
163 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
178 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
182 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
262 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 32768
266 ; MIPS32-AE: ori [[R2:\$[0-9]+]], $zero, 3276
[all...] |
