| /external/qemu/target-i386/ |
| seg_helper.c | 150 } else if (seg_reg == R_SS) {
173 if (seg_reg == R_SS || seg_reg == R_CS)
402 tss_load_seg(env, R_SS, new_segs[R_SS]);
533 if (env->segs[R_SS].flags & DESC_B_MASK)
538 ssp = env->segs[R_SS].base + esp;
603 sp_mask = get_sp_mask(env->segs[R_SS].flags);
604 ssp = env->segs[R_SS].base;
632 PUSHL(ssp, esp, sp_mask, env->segs[R_SS].selector);
649 PUSHW(ssp, esp, sp_mask, env->segs[R_SS].selector)
[all...] |
| kvm.c | 403 set_v8086_seg(&sregs.ss, &env->segs[R_SS]);
410 set_seg(&sregs.ss, &env->segs[R_SS]);
518 get_seg(&env->segs[R_SS], &sregs.ss);
563 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
572 env->segs[R_SS].base) != 0) <<
|
| svm_helper.c | 148 &env->segs[R_SS]);
205 env, R_SS);
507 &env->segs[R_SS]);
569 env, R_SS);
|
| hax-all.c | 734 get_seg(&env->segs[R_SS], &sregs->_ss);
753 set_v8086_seg(&sregs->_ss, &env->segs[R_SS]);
760 set_seg(&sregs->_ss, &env->segs[R_SS]);
811 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
820 env->segs[R_SS].base) != 0) <<
|
| translate.c | [all...] |
| cpu.h | 74 #define R_SS 2
906 new_hflags = (env->segs[R_SS].flags & DESC_B_MASK)
922 env->segs[R_SS].base) != 0) <<
[all...] |
| smm_helper.c | 165 cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffffffff, 0);
|
| helper.c | 508 cpu_x86_load_seg_cache(env, R_SS, 0, 0, 0xffff,
[all...] |
| /external/libpcap/msdos/ |
| pktdrvr.c | 76 WORD r_ip, r_cs, r_sp, r_ss;
member in struct:DPMI_regs
331 reg.r_ss = reg.r_sp = 0; /* DPMI host provides stack */
[all...] |
| /external/qemu/ |
| gdbstub.c | 542 case 3: GET_REG32(env->segs[R_SS].selector);
601 case 3: LOAD_SEG(11, R_SS); return 4;
[all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_x86_toIR.c | 306 #define R_SS 2
489 case R_SS: return OFFB_SS;
[all...] |
| guest_amd64_toIR.c | 467 #define R_SS 2
[all...] |
