Lines Matching refs:dalvikInsn
233 DCHECK(static_cast<int>(insn->dalvikInsn.opcode) == kMirOpCheck ||
234 !MIR::DecodedInstruction::IsPseudoMirOp(insn->dalvikInsn.opcode));
242 int opcode = p->dalvikInsn.opcode;
403 switch (insn->dalvikInsn.opcode) {
407 target += insn->dalvikInsn.vA;
416 target += insn->dalvikInsn.vC;
425 target += insn->dalvikInsn.vB;
428 LOG(FATAL) << "Unexpected opcode(" << insn->dalvikInsn.opcode << ") with kBranch set";
469 reinterpret_cast<const uint16_t*>(GetCurrentInsns() + cur_offset + insn->dalvikInsn.vB);
485 if (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) {
515 (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) ? kPackedSwitch : kSparseSwitch;
527 (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) ?
546 bool is_throw = (insn->dalvikInsn.opcode == Instruction::THROW);
563 if (insn->dalvikInsn.opcode == Instruction::MONITOR_EXIT &&
641 insn->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpCheck);
727 int width = ParseInsn(code_ptr, &insn->dalvikInsn);
728 Instruction::Code opcode = insn->dalvikInsn.opcode;
733 int flags = Instruction::FlagsOf(insn->dalvikInsn.opcode);
734 int verify_flags = Instruction::VerifyFlagsOf(insn->dalvikInsn.opcode);
812 int first_reg_in_range = insn->dalvikInsn.vC;
813 int last_reg_in_range = first_reg_in_range + insn->dalvikInsn.vA - 1;
868 Instruction::Code opcode = mir->dalvikInsn.opcode;
915 int opcode = mir->dalvikInsn.opcode;
920 mir->dalvikInsn.vA,
921 mir->dalvikInsn.vB,
922 mir->dalvikInsn.arg[0],
923 mir->dalvikInsn.arg[1],
924 mir->dalvikInsn.arg[2],
925 mir->dalvikInsn.arg[3],
930 mir->dalvikInsn.vA,
931 mir->dalvikInsn.vB,
932 mir->dalvikInsn.vC,
939 Instruction::Name(mir->dalvikInsn.opcode) :
1216 MIR::DecodedInstruction insn = mir->dalvikInsn;
1232 insn = mir->meta.throw_insn->dalvikInsn;
1461 move_result_mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop);
1472 info->index = mir->dalvikInsn.vB;
