Lines Matching refs:right
73 // converting the comparison to Cbz/Cbnz if the right-hand side is 0.
1307 Operand LCodeGen::ToShiftedRightOperand32(LOperand* right, LI* shift_info) {
1309 return ToOperand32(right);
1312 ToRegister32(right),
1502 Operand right = (instr->right()->IsConstantOperand())
1503 ? ToInteger32(LConstantOperand::cast(instr->right()))
1504 : Operand(ToRegister32(instr->right()), SXTW);
1507 __ Add(result, left, right);
1515 Operand right = ToShiftedRightOperand32(instr->right(), instr);
1518 __ Adds(result, left, right);
1521 __ Add(result, left, right);
1530 Operand right = ToOperand(instr->right());
1532 __ Adds(result, left, right);
1535 __ Add(result, left, right);
1747 DoubleRegister right = ToDoubleRegister(instr->right());
1751 case Token::ADD: __ Fadd(result, left, right); break;
1752 case Token::SUB: __ Fsub(result, left, right); break;
1753 case Token::MUL: __ Fmul(result, left, right); break;
1754 case Token::DIV: __ Fdiv(result, left, right); break;
1766 DCHECK(right.Is(d1));
1783 DCHECK(ToRegister(instr->right()).is(x0));
1795 Operand right = ToShiftedRightOperand32(instr->right(), instr);
1798 case Token::BIT_AND: __ And(result, left, right); break;
1799 case Token::BIT_OR: __ Orr(result, left, right); break;
1800 case Token::BIT_XOR: __ Eor(result, left, right); break;
1811 Operand right = ToOperand(instr->right());
1814 case Token::BIT_AND: __ And(result, left, right); break;
1815 case Token::BIT_OR: __ Orr(result, left, right); break;
1816 case Token::BIT_XOR: __ Eor(result, left, right); break;
2477 LOperand* right = instr->right();
2480 instr->hydrogen()->right()->CheckFlag(HInstruction::kUint32);
2483 if (left->IsConstantOperand() && right->IsConstantOperand()) {
2486 double right_val = ToDouble(LConstantOperand::cast(right));
2492 __ Fcmp(ToDoubleRegister(left), ToDoubleRegister(right));
2500 if (right->IsConstantOperand()) {
2502 ToOperand32(right));
2506 ToRegister32(right), ToOperand32(left));
2510 if (right->IsConstantOperand()) {
2511 int32_t value = ToInteger32(LConstantOperand::cast(right));
2521 ToRegister(right),
2527 ToRegister(right));
2537 Register right = ToRegister(instr->right());
2538 EmitCompareAndBranch(instr, eq, left, right);
2548 DCHECK(ToRegister(instr->right()).Is(x0));
3036 DCHECK(ToRegister(instr->right()).Is(InstanceofStub::right()));
3151 __ LoadObject(InstanceofStub::right(), instr->function());
3912 // can simply do an arithmetic right shift.
4076 Representation exponent_type = instr->hydrogen()->right()->representation();
4081 DCHECK(!instr->right()->IsDoubleRegister() ||
4082 ToDoubleRegister(instr->right()).is(d1));
4083 DCHECK(exponent_type.IsInteger32() || !instr->right()->IsRegister() ||
4084 ToRegister(instr->right()).is(tagged_exponent));
4086 ToRegister(instr->right()).is(integer_exponent));
4218 Operand right = ToOperand32(instr->right());
4220 __ Cmp(left, right);
4221 __ Csel(result, left, right, (op == HMathMinMax::kMathMax) ? ge : le);
4225 Operand right = ToOperand(instr->right());
4227 __ Cmp(left, right);
4228 __ Csel(result, left, right, (op == HMathMinMax::kMathMax) ? ge : le);
4233 DoubleRegister right = ToDoubleRegister(instr->right());
4236 __ Fmax(result, left, right);
4239 __ Fmin(result, left, right);
4307 Register divisor = ToRegister32(instr->right());
4332 int32_t right = ToInteger32(instr->right());
4333 DCHECK((right > -kMaxInt) || (right < kMaxInt));
4340 if (right < 0) {
4341 // The result is -0 if right is negative and left is zero.
4343 } else if (right == 0) {
4344 // The result is -0 if the right is zero and the left is negative.
4349 switch (right) {
4380 int32_t right_abs = Abs(right);
4393 if (right >= 0) {
4394 // result = left << log2(right)
4397 // result = -left << log2(-right)
4414 if (right >= 0) {
4415 if (base::bits::IsPowerOfTwo32(right - 1)) {
4416 // result = left + left << log2(right - 1)
4417 __ Add(result, left, Operand(left, LSL, WhichPowerOf2(right - 1)));
4418 } else if (base::bits::IsPowerOfTwo32(right + 1)) {
4419 // result = -left + left << log2(right + 1)
4420 __ Sub(result, left, Operand(left, LSL, WhichPowerOf2(right + 1)));
4426 if (base::bits::IsPowerOfTwo32(-right + 1)) {
4427 // result = left - left << log2(-right + 1)
4428 __ Sub(result, left, Operand(left, LSL, WhichPowerOf2(-right + 1)));
4429 } else if (base::bits::IsPowerOfTwo32(-right - 1)) {
4430 // result = -left - left << log2(-right - 1)
4431 __ Add(result, left, Operand(left, LSL, WhichPowerOf2(-right - 1)));
4444 Register right = ToRegister32(instr->right());
4450 if (bailout_on_minus_zero && !left.Is(right)) {
4452 // - Set Z (eq) if either left or right, or both, are 0.
4454 __ Ccmp(right, 0, ZFlag, ne);
4455 // - If so (eq), set N (mi) if left + right is negative.
4457 __ Ccmn(left, right, NoFlag, eq);
4462 __ Smull(result.X(), left, right);
4466 __ Mul(result, left, right);
4474 Register right = ToRegister(instr->right());
4480 if (bailout_on_minus_zero && !left.Is(right)) {
4482 // - Set Z (eq) if either left or right, or both, are 0.
4484 __ Ccmp(right, 0, ZFlag, ne);
4485 // - If so (eq), set N (mi) if left + right is negative.
4487 __ Ccmn(left, right, NoFlag, eq);
4493 __ Smulh(result, left, right);
4498 if (AreAliased(result, left, right)) {
4504 } else if (result.Is(left) && !left.Is(right)) {
4505 // Registers result and left alias, right is distinct: untag left into
4506 // result, and then multiply by right, giving a tagged result.
4508 __ Mul(result, result, right);
4511 // Registers result and right alias, left is distinct, or all registers
4512 // are distinct: untag right into result, and then multiply by left,
4514 __ SmiUntag(result, right);
4893 LOperand* right_op = instr->right();
4898 Register right = ToRegister32(instr->right());
4900 case Token::ROR: __ Ror(result, left, right); break;
4901 case Token::SAR: __ Asr(result, left, right); break;
4902 case Token::SHL: __ Lsl(result, left, right); break;
4904 __ Lsr(result, left, right);
4906 // If `left >>> right` >= 0x80000000, the result is not representable
4935 LOperand* right_op = instr->right();
4940 Register right = ToRegister(instr->right());
4942 // JavaScript shifts only look at the bottom 5 bits of the 'right' operand.
4945 __ Ubfx(result, right, kSmiShift, 5);
4969 // If `left >>> right` >= 0x80000000, the result is not representable
5443 DCHECK(ToRegister(instr->right()).Is(x0));
5561 Operand right = ToShiftedRightOperand32(instr->right(), instr);
5564 __ Subs(result, left, right);
5567 __ Sub(result, left, right);
5576 Operand right = ToOperand(instr->right());
5578 __ Subs(result, left, right);
5581 __ Sub(result, left, right);
