Lines Matching refs:right
1066 // Note: The code below even works when right contains kMinInt.
1111 const Register right_reg = ToRegister(instr->right());
1293 // can simply do an arithmetic right shift.
1434 LOperand* right_op = instr->right();
1503 Register right = ToRegister(right_op);
1506 // hi:lo = left * right.
1508 __ Dmulh(result, left, right);
1510 __ Dmul(result, left, right);
1521 __ Dmul(result, result, right);
1523 __ Dmul(result, left, right);
1529 __ Xor(at, left, right);
1541 LOperand* right_op = instr->right();
1545 Operand right(no_reg);
1548 right = Operand(EmitLoadRegister(right_op, at));
1551 right = ToOperand(right_op);
1556 __ And(result, left, right);
1559 __ Or(result, left, right);
1562 if (right_op->IsConstantOperand() && right.immediate() == int32_t(~0)) {
1565 __ Xor(result, left, right);
1576 // Both 'left' and 'right' are "used at start" (see LCodeGen::DoShift), so
1578 LOperand* right_op = instr->right();
1583 // No need to mask the right operand on MIPS, it is built into the variable
1658 LOperand* right = instr->right();
1663 if (right->IsStackSlot()) {
1664 Register right_reg = EmitLoadRegister(right, at);
1667 DCHECK(right->IsRegister() || right->IsConstantOperand());
1668 __ Dsubu(ToRegister(result), ToRegister(left), ToOperand(right));
1673 if (right->IsStackSlot() || right->IsConstantOperand()) {
1674 Register right_reg = EmitLoadRegister(right, scratch);
1680 DCHECK(right->IsRegister());
1685 ToRegister(right),
1852 LOperand* right = instr->right();
1857 if (right->IsStackSlot()) {
1858 Register right_reg = EmitLoadRegister(right, at);
1861 DCHECK(right->IsRegister() || right->IsConstantOperand());
1862 __ Daddu(ToRegister(result), ToRegister(left), ToOperand(right));
1867 if (right->IsStackSlot() ||
1868 right->IsConstantOperand()) {
1869 Register right_reg = EmitLoadRegister(right, scratch);
1875 DCHECK(right->IsRegister());
1880 ToRegister(right),
1895 LOperand* right = instr->right();
1900 Register right_reg = EmitLoadRegister(right, scratch0());
1916 FPURegister right_reg = ToDoubleRegister(right);
1924 // left == right != 0.
1926 // At this point, both left and right are either 0 or -0.
1956 DoubleRegister right = ToDoubleRegister(instr->right());
1960 __ add_d(result, left, right);
1963 __ sub_d(result, left, right);
1966 __ mul_d(result, left, right);
1969 __ div_d(result, left, right);
1977 __ MovToFloatParameters(left, right);
1998 DCHECK(ToRegister(instr->right()).is(a0));
2258 LOperand* right = instr->right();
2261 instr->hydrogen()->right()->CheckFlag(HInstruction::kUint32);
2264 if (left->IsConstantOperand() && right->IsConstantOperand()) {
2267 double right_val = ToDouble(LConstantOperand::cast(right));
2273 // Compare left and right as doubles and load the
2276 FPURegister right_reg = ToDoubleRegister(right);
2287 if (right->IsConstantOperand()) {
2288 int32_t value = ToInteger32(LConstantOperand::cast(right));
2299 cmp_left = ToRegister(right);
2302 cmp_left = ToRegister(right);
2309 cmp_right = Operand(ToRegister(right));
2320 Register right = ToRegister(instr->right());
2322 EmitBranch(instr, eq, left, Operand(right));
2645 DCHECK(ToRegister(instr->right()).is(a1)); // Function is in a1.
2760 __ li(InstanceofStub::right(), instr->function());
3876 Representation exponent_type = instr->hydrogen()->right()->representation();
3880 DCHECK(!instr->right()->IsDoubleRegister() ||
3881 ToDoubleRegister(instr->right()).is(f4));
3882 DCHECK(!instr->right()->IsRegister() ||
3883 ToRegister(instr->right()).is(tagged_exponent));
4537 DCHECK(ToRegister(instr->right()).is(a0));
