Lines Matching refs:tii
156 if (!TII->isUnpredicatedTerminator(I))
183 const TargetInstrInfo *tii,
186 if (!tii) return false;
190 TII = tii;
207 if (!TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true))
405 TII->ReplaceTailWithBranchTo(OldInst, NewDest);
419 if (!TII->isLegalToSplitMBBAt(CurMBB, BBI1))
467 const TargetInstrInfo *TII) {
474 !TII->AnalyzeBranch(*CurMBB, TBB, FBB, Cond, true)) {
477 if (!TII->ReverseBranchCondition(Cond)) {
478 TII->RemoveBranch(*CurMBB);
479 TII->InsertBranch(*CurMBB, SuccBB, nullptr, Cond, dl);
484 TII->InsertBranch(*CurMBB, SuccBB, nullptr,
646 FixTail(CurMBB, SuccBB, TII);
902 if (!TII->AnalyzeBranch(*PBB, TBB, FBB, Cond, true)) {
907 if (TII->ReverseBranchCondition(NewCond))
940 TII->RemoveBranch(*PBB);
943 TII->InsertBranch(*PBB, (TBB == IBB) ? FBB : TBB, nullptr,
965 FixTail(MergePotentials.begin()->getBlock(), IBB, TII);
1107 TII->AnalyzeBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, true);
1118 TII->RemoveBranch(PrevBB);
1121 TII->InsertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1166 TII->RemoveBranch(PrevBB);
1176 TII->RemoveBranch(PrevBB);
1177 TII->InsertBranch(PrevBB, PriorTBB, nullptr, PriorCond, dl);
1188 if (!TII->ReverseBranchCondition(NewPriorCond)) {
1190 TII->RemoveBranch(PrevBB);
1191 TII->InsertBranch(PrevBB, PriorFBB, nullptr, NewPriorCond, dl);
1223 if (!TII->ReverseBranchCondition(NewPriorCond)) {
1228 TII->RemoveBranch(PrevBB);
1229 TII->InsertBranch(PrevBB, MBB, nullptr, NewPriorCond, dl);
1244 bool CurUnAnalyzable= TII->AnalyzeBranch(*MBB, CurTBB, CurFBB, CurCond, true);
1256 if (!TII->ReverseBranchCondition(NewCond)) {
1258 TII->RemoveBranch(*MBB);
1259 TII->InsertBranch(*MBB, CurFBB, CurTBB, NewCond, dl);
1275 TII->RemoveBranch(*MBB);
1315 TII->RemoveBranch(PrevBB);
1316 TII->InsertBranch(PrevBB, PriorTBB, PriorFBB, PriorCond, pdl);
1337 bool NewCurUnAnalyzable = TII->AnalyzeBranch(*PMBB, NewCurTBB,
1341 TII->RemoveBranch(*PMBB);
1343 TII->InsertBranch(*PMBB, NewCurTBB, nullptr, NewCurCond, pdl);
1363 TII->InsertBranch(*MBB, CurTBB, nullptr, CurCond, dl);
1387 !TII->AnalyzeBranch(*PredBB, PredTBB, PredFBB, PredCond, true)
1404 TII->InsertBranch(*MBB, NextBB, nullptr, CurCond, DebugLoc());
1440 !TII->AnalyzeBranch(PrevBB, PrevTBB, PrevFBB, PrevCond, true) &&
1490 const TargetInstrInfo *TII,
1495 if (!TII->isUnpredicatedTerminator(Loc))
1559 if (!PI->isSafeToMove(TII, nullptr, DontMoveAcrossStore) ||
1560 TII->isPredicated(PI))
1595 if (TII->AnalyzeBranch(*MBB, TBB, FBB, Cond, true) || !TBB || Cond.empty())
1613 findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs);
1641 if (TII->isPredicated(TIB))
1698 if (!TIB->isSafeToMove(TII, nullptr, DontMoveAcrossStore))
