Cross Reference: /external/llvm/lib/Target/Mips/MipsISelLowering.cpp

Lines Matching refs:MCPhysReg

59 static const MCPhysReg O32IntRegs[4] = {
63 static const MCPhysReg Mips64IntRegs[8] = {
68 static const MCPhysReg Mips64DPRegs[8] = {
2212                        CCState &State, const MCPhysReg *F64Regs) {
2216   static const MCPhysReg IntRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3 };
2217   static const MCPhysReg F32Regs[] = { Mips::F12, Mips::F14 };
2289   static const MCPhysReg F64Regs[] = { Mips::D6, Mips::D7 };
2297   static const MCPhysReg F64Regs[] = { Mips::D12_64, Mips::D14_64 };
3473 const MCPhysReg *MipsTargetLowering::MipsCC::intArgRegs() const {
3490 const MCPhysReg *MipsTargetLowering::MipsCC::shadowRegs() const {
3498   const MCPhysReg *IntArgRegs = intArgRegs(), *ShadowRegs = shadowRegs();
3590     const MCPhysReg *ArgRegs = CC.intArgRegs();
3676   const MCPhysReg *ArgRegs = CC.intArgRegs();

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