Lines Matching refs:MipsTargetLowering
85 SDValue MipsTargetLowering::getGlobalReg(SelectionDAG &DAG, EVT Ty) const {
90 SDValue MipsTargetLowering::getTargetNode(GlobalAddressSDNode *N, EVT Ty,
96 SDValue MipsTargetLowering::getTargetNode(ExternalSymbolSDNode *N, EVT Ty,
102 SDValue MipsTargetLowering::getTargetNode(BlockAddressSDNode *N, EVT Ty,
108 SDValue MipsTargetLowering::getTargetNode(JumpTableSDNode *N, EVT Ty,
114 SDValue MipsTargetLowering::getTargetNode(ConstantPoolSDNode *N, EVT Ty,
121 const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
211 MipsTargetLowering::MipsTargetLowering(MipsTargetMachine &TM)
406 const MipsTargetLowering *MipsTargetLowering::create(MipsTargetMachine &TM) {
415 MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
422 EVT MipsTargetLowering::getSetCCResultType(LLVMContext &, EVT VT) const {
738 SDValue MipsTargetLowering::PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI)
762 MipsTargetLowering::LowerOperationWrapper(SDNode *N,
772 MipsTargetLowering::ReplaceNodeResults(SDNode *N,
778 SDValue MipsTargetLowering::
854 MipsTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
954 MipsTargetLowering::emitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB,
1042 MachineBasicBlock *MipsTargetLowering::emitSignExtendToI32InReg(
1072 MachineBasicBlock *MipsTargetLowering::emitAtomicBinaryPartword(
1223 MachineBasicBlock * MipsTargetLowering::emitAtomicCmpSwap(MachineInstr *MI,
1304 MipsTargetLowering::emitAtomicCmpSwapPartword(MachineInstr *MI,
1445 MachineBasicBlock *MipsTargetLowering::emitSEL_D(MachineInstr *MI,
1474 SDValue MipsTargetLowering::lowerBR_JT(SDValue Op, SelectionDAG &DAG) const {
1505 SDValue MipsTargetLowering::lowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
1529 SDValue MipsTargetLowering::
1543 SDValue MipsTargetLowering::
1557 SDValue MipsTargetLowering::lowerSETCC(SDValue Op, SelectionDAG &DAG) const {
1570 SDValue MipsTargetLowering::lowerGlobalAddress(SDValue Op,
1613 SDValue MipsTargetLowering::lowerBlockAddress(SDValue Op,
1626 SDValue MipsTargetLowering::
1705 SDValue MipsTargetLowering::
1719 SDValue MipsTargetLowering::
1742 SDValue MipsTargetLowering::lowerVASTART(SDValue Op, SelectionDAG &DAG) const {
1853 MipsTargetLowering::lowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const {
1860 SDValue MipsTargetLowering::
1876 SDValue MipsTargetLowering::lowerRETURNADDR(SDValue Op,
1900 SDValue MipsTargetLowering::lowerEH_RETURN(SDValue Op, SelectionDAG &DAG)
1924 SDValue MipsTargetLowering::lowerATOMIC_FENCE(SDValue Op,
1934 SDValue MipsTargetLowering::lowerShiftLeftParts(SDValue Op,
1965 SDValue MipsTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG,
2024 SDValue MipsTargetLowering::lowerLOAD(SDValue Op, SelectionDAG &DAG) const {
2149 SDValue MipsTargetLowering::lowerSTORE(SDValue Op, SelectionDAG &DAG) const {
2162 SDValue MipsTargetLowering::lowerADD(SDValue Op, SelectionDAG &DAG) const {
2183 SDValue MipsTargetLowering::lowerFP_TO_SINT(SDValue Op,
2315 MipsTargetLowering::passArgOnStack(SDValue StackPtr, unsigned Offset,
2332 void MipsTargetLowering::
2388 MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
2604 MipsTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
2643 MipsTargetLowering::LowerFormalArguments(SDValue Chain,
2792 MipsTargetLowering::CanLowerReturn(CallingConv::ID CallConv,
2803 MipsTargetLowering::LowerReturn(SDValue Chain,
2876 MipsTargetLowering::ConstraintType MipsTargetLowering::
2911 MipsTargetLowering::getSingleConstraintMatchWeight(
2985 std::pair<unsigned, const TargetRegisterClass *> MipsTargetLowering::
3061 std::pair<unsigned, const TargetRegisterClass*> MipsTargetLowering::
3124 void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
3217 bool MipsTargetLowering::isLegalAddressingMode(const AddrMode &AM,
3238 MipsTargetLowering::isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const {
3243 EVT MipsTargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
3254 bool MipsTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
3262 unsigned MipsTargetLowering::getJumpTableEncoding() const {
3285 MipsTargetLowering::LTStr Comp;
3309 MipsTargetLowering::MipsCC::SpecialCallingConvType
3310 MipsTargetLowering::getSpecialCallingConv(SDValue Callee) const {
3325 MipsTargetLowering::MipsCC::MipsCC(
3335 void MipsTargetLowering::MipsCC::
3373 void MipsTargetLowering::MipsCC::
3405 void MipsTargetLowering::MipsCC::
3430 void MipsTargetLowering::MipsCC::
3436 void MipsTargetLowering::MipsCC::
3442 void MipsTargetLowering::MipsCC::handleByValArg(unsigned ValNo, MVT ValVT,
3465 unsigned MipsTargetLowering::MipsCC::numIntArgRegs() const {
3469 unsigned MipsTargetLowering::MipsCC::reservedArgArea() const {
3473 const MCPhysReg *MipsTargetLowering::MipsCC::intArgRegs() const {
3477 llvm::CCAssignFn *MipsTargetLowering::MipsCC::fixedArgFn() const {
3486 llvm::CCAssignFn *MipsTargetLowering::MipsCC::varArgFn() const {
3490 const MCPhysReg *MipsTargetLowering::MipsCC::shadowRegs() const {
3494 void MipsTargetLowering::MipsCC::allocateRegs(ByValArgInfo &ByVal,
3517 MVT MipsTargetLowering::MipsCC::getRegVT(MVT VT, const Type *OrigTy,
3532 void MipsTargetLowering::
3576 void MipsTargetLowering::
3672 void MipsTargetLowering::writeVarArgRegs(std::vector<SDValue> &OutChains,
