Lines Matching refs:Address
10 0x04 address_offset Counts the number of loads blocked by a preceding store address
27 0x20 pde_miss Number of DTLB cache load misses where the low part of the linear to physical address translation was missed
28 0x40 pdp_miss Number of DTLB cache load misses where the high part of the linear to physical address translation was missed
158 0x20 pde_miss Number of DTLB cache misses where the low part of the linear to physical address translation was missed
159 0x40 pdp_miss Number of DTLB misses where the high part of the linear to physical address translation was missed
201 0x20 pde_miss Number of ITLB misses where the low part of the linear to physical address translation was missed
202 0x40 pdp_miss Number of ITLB misses where the high part of the linear to physical address translation was missed
302 0x40 hit_lfb Counts number of retired loads that miss the L1D and the address is located in an allocated line fill buffer and will soon be committed to cache
321 0x01 clear Counts the number of times the front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction and this is corrected by the Branch Address Calculator at the front end
322 0x02 bad_target Counts number of Branch Address Calculator clears (BACLEAR) asserted due to conditional branch instructions in which there was a target hit but the direction was wrong
