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Searched
defs:BIT
(Results
1 - 10
of
10
) sorted by null
/external/ltrace/sysdeps/linux-gnu/arm/
regs.h
22
#define
BIT
(obj,st) (((obj) >> (st)) & 1)
25
((long) (BITS(obj,st,fn) | ((long)
BIT
(obj,fn) * ~ SUBMASK(fn - st))))
/external/chromium_org/third_party/libvpx/source/libvpx/vpx_ports/
x86.h
115
#ifndef
BIT
116
#define
BIT
(n) (1<<n)
147
if (reg_edx &
BIT
(23)) flags |= HAS_MMX;
149
if (reg_edx &
BIT
(25)) flags |= HAS_SSE; /* aka xmm */
151
if (reg_edx &
BIT
(26)) flags |= HAS_SSE2; /* aka wmt */
153
if (reg_ecx &
BIT
(0)) flags |= HAS_SSE3;
155
if (reg_ecx &
BIT
(9)) flags |= HAS_SSSE3;
157
if (reg_ecx &
BIT
(19)) flags |= HAS_SSE4_1;
159
if (reg_ecx &
BIT
(28)) flags |= HAS_AVX;
166
if (reg_ebx &
BIT
(5)) flags |= HAS_AVX2
[
all
...]
/external/chromium_org/third_party/libwebp/enc/
iterator.c
228
#define
BIT
(nz, n) (!!((nz) & (1 << (n))))
236
top_nz[0] =
BIT
(tnz, 12);
237
top_nz[1] =
BIT
(tnz, 13);
238
top_nz[2] =
BIT
(tnz, 14);
239
top_nz[3] =
BIT
(tnz, 15);
241
top_nz[4] =
BIT
(tnz, 18);
242
top_nz[5] =
BIT
(tnz, 19);
244
top_nz[6] =
BIT
(tnz, 22);
245
top_nz[7] =
BIT
(tnz, 23);
247
top_nz[8] =
BIT
(tnz, 24)
[
all
...]
/external/libunwind/tests/
Gia64-test-nat.c
26
/* This file tests corner-cases of NaT-
bit
handling. */
505
# define
BIT
(n) ((unw_word_t) 1 << (n))
506
# define DONTCARE (
BIT
( 6) |
BIT
( 7) |
BIT
( 8) |
BIT
( 9) |
BIT
(10) \
507
|
BIT
(11) |
BIT
(12) |
BIT
(13) | BIT(14) | BIT(15)
[
all
...]
/external/libvpx/libvpx/vpx_ports/
x86.h
115
#ifndef
BIT
116
#define
BIT
(n) (1<<n)
147
if (reg_edx &
BIT
(23)) flags |= HAS_MMX;
149
if (reg_edx &
BIT
(25)) flags |= HAS_SSE; /* aka xmm */
151
if (reg_edx &
BIT
(26)) flags |= HAS_SSE2; /* aka wmt */
153
if (reg_ecx &
BIT
(0)) flags |= HAS_SSE3;
155
if (reg_ecx &
BIT
(9)) flags |= HAS_SSSE3;
157
if (reg_ecx &
BIT
(19)) flags |= HAS_SSE4_1;
159
if (reg_ecx &
BIT
(28)) flags |= HAS_AVX;
166
if (reg_ebx &
BIT
(5)) flags |= HAS_AVX2
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64ISelLowering.h
29
WrapperLarge, // 4-instruction MOVZ/MOVK sequence for 64-
bit
addresses.
90
// Vector
bit
select: similar to ISD::VSELECT but not all bits within an
147
BIT
,
312
/// \brief Returns false if N is a
bit
extraction pattern of (X >> C) & Mask.
/external/linux-tools-perf/perf-3.12.0/tools/perf/bench/
numa.c
170
OPT_BOOLEAN('r', "data_rand_walk", &p0.data_rand_walk, "access the data with random (32
bit
LFSR) walk"),
667
#define
BIT
(x) (1ul << x)
671
const uint32_t taps =
BIT
(1) |
BIT
(5) |
BIT
(6) |
BIT
(31);
[
all
...]
/external/llvm/lib/Target/R600/
R600ISelLowering.cpp
165
// We don't have 64-
bit
shifts. Thus we need either SHX i64 or SHX_PARTS i32
274
.addImm(EOP); // Set End of program
bit
[
all
...]
/external/mksh/src/
sh.h
195
* These types are exactly 32
bit
wide; signed and unsigned
450
/* define
bit
in flag */
451
#define
BIT
(i) (1 << (i))
456
* not a char that is used often. Also, can't use the high
bit
as it causes
732
#define EF_BRKCONT_PASS
BIT
(1) /* set if E_LOOP must pass break/continue on */
733
#define EF_FAKE_SIGDIE
BIT
(2) /* hack to get info from unwind to quitenv */
870
#define TF_SHELL_USES
BIT
(0) /* shell uses signal, user can't change */
871
#define TF_USER_SET
BIT
(1) /* user has (tried to) set trap */
872
#define TF_ORIG_IGN
BIT
(2) /* original action was SIG_IGN */
873
#define TF_ORIG_DFL
BIT
(3) /* original action was SIG_DFL *
[
all
...]
/external/chromium_org/third_party/libaddressinput/src/java/
android.jar
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