HomeSort by relevance Sort by last modified time
    Searched defs:DstIdx (Results 1 - 6 of 6) sorted by null

  /external/llvm/lib/CodeGen/
RegisterCoalescer.h 38 /// DstIdx - The sub-register index of the old DstReg in the new coalesced
40 unsigned DstIdx;
63 : TRI(tri), DstReg(0), SrcReg(0), DstIdx(0), SrcIdx(0),
70 : TRI(tri), DstReg(PhysReg), SrcReg(VirtReg), DstIdx(0), SrcIdx(0),
109 unsigned getDstIdx() const { return DstIdx; }
TwoAddressInstructionPass.cpp 129 unsigned SrcIdx, unsigned DstIdx,
    [all...]
RegisterCoalescer.cpp 253 SrcIdx = DstIdx = 0;
300 SrcIdx, DstIdx);
309 DstIdx = SrcSub;
322 if (DstIdx && !SrcIdx) {
324 std::swap(SrcIdx, DstIdx);
343 std::swap(SrcIdx, DstIdx);
367 assert(!DstIdx && !SrcIdx && "Inconsistent CoalescerPair state.");
382 TRI.composeSubRegIndices(DstIdx, DstSub);
737 unsigned DstIdx = CP.isFlipped() ? CP.getSrcIdx() : CP.getDstIdx();
770 // If both SrcIdx and DstIdx are set, correct rematerialization would wide
    [all...]
  /external/llvm/lib/Target/R600/
R600ExpandSpecialInstrs.cpp 82 int DstIdx = TII->getOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst);
83 assert(DstIdx != -1);
84 MachineOperand &DstOp = MI.getOperand(DstIdx);
R600Packetizer.cpp 93 int DstIdx = TII->getOperandIdx(BI->getOpcode(), AMDGPU::OpName::dst);
94 if (DstIdx == -1) {
97 unsigned Dst = BI->getOperand(DstIdx).getReg();
R600ISelLowering.cpp 199 int DstIdx = TII->getOperandIdx(MI->getOpcode(), AMDGPU::OpName::dst);
200 assert(DstIdx != -1);
202 if (!MRI.use_empty(MI->getOperand(DstIdx).getReg()))
    [all...]

Completed in 67 milliseconds