/external/chromium_org/tools/grit/grit/extern/ |
BogoFP.py | 14 import grit.extern.FP 22 grit.extern.FP._UnsignedFingerPrintImpl(str, encoding))
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tclib.py | 16 from grit.extern import FP 36 fp = FP.FingerPrint(message) 39 fp2 = FP.FingerPrint(meaning) 40 if fp < 0: 41 fp = fp2 + (fp << 1) + 1 43 fp = fp2 + (fp << 1) 45 return str(fp & 0x7fffffffffffffffL [all...] |
/external/clang/test/Sema/ |
block-call.c | 3 int (*FP)(); 7 int (*FPL) (int) = FP; // C doesn't consider this an error.
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/external/clang/test/SemaCXX/ |
block-call.cpp | 3 int (*FP)(); 7 int (*FPL) (int) = FP; // expected-error {{cannot initialize a variable of type 'int (*)(int)' with an lvalue of type 'int (*)()'}}
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explicit.cpp | 230 struct FP { 237 FP fp; local 239 fp(1);
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/external/chromium_org/third_party/boringssl/src/crypto/des/ |
internal.h | 126 /* IP and FP 157 Thanks for hints from Richard Outerbridge - he told me IP&FP 176 #define FP(l, r) \
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/external/chromium_org/tools/grit/grit/format/ |
rc_header.py | 11 from grit.extern import FP 180 id = FP.UnsignedFingerPrint(tid)
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/external/libcxx/src/ |
chrono.cpp | 88 typedef steady_clock::rep (*FP)(); 91 FP 106 static FP fp = init_steady_clock(); variable 107 return time_point(duration(fp()));
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/external/clang/test/CodeGen/ |
pointer-arithmetic.c | 10 typedef void (*FP)(void); 18 FP f5(FP a, int b) { return a + b; } 19 FP f5_1(FP a, int b) { return (a += b); } 20 FP f6(int a, FP b) { return a + b; } 21 FP f6_1(int a, FP b) { return (a += b); } 22 FP f7(FP a, int b) { return a - b; [all...] |
struct-init.c | 37 void (*FP)(struct fp_struct_bar);
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/external/llvm/lib/Target/Hexagon/ |
HexagonExpandPredSpillCode.cpp | 88 unsigned FP = MI->getOperand(0).getReg(); 89 assert(FP == QTM.getRegisterInfo()->getFrameRegister() && 103 .addReg(FP).addReg(HEXAGON_RESERVED_REG_1); 112 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset); 126 addReg(FP).addImm(Offset).addReg(HEXAGON_RESERVED_REG_2); 135 unsigned FP = MI->getOperand(1).getReg(); 136 assert(FP == QTM.getRegisterInfo()->getFrameRegister() && 147 .addReg(FP) 157 HEXAGON_RESERVED_REG_1).addReg(FP).addImm(Offset); 167 HEXAGON_RESERVED_REG_2).addReg(FP).addImm(Offset) [all...] |
/external/openssl/crypto/des/ |
des_locl.h | 363 /* IP and FP 394 Thanks for hints from Richard Outerbridge - he told me IP&FP 414 #define FP(l,r) \
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/art/runtime/arch/arm/ |
registers_arm.h | 44 FP = 11,
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/external/chromium_org/tools/grit/grit/ |
grit_runner.py | 19 import grit.extern.FP 132 grit.extern.FP.UnsignedFingerprint. MODULE must be 260 grit.extern.FP.UseUnsignedFingerPrintFromModule(options.hash)
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
AArch64AsmBackend.cpp | 277 /// \brief This is a standard arm64 prologue where FP/LR are immediately 278 /// pushed on the stack, then SP is copied to FP. If there are any 280 /// in a contiguous ranger right below the saved FP/LR pair. Any subset of the 375 AArch64::FP && 392 assert(LRReg == AArch64::LR && FPReg == AArch64::FP &&
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/external/llvm/tools/bugpoint/ |
ExtractFunction.cpp | 249 Constant *FP = CS->getOperand(1); 250 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP)) 252 FP = CE->getOperand(0); 253 if (Function *F = dyn_cast<Function>(FP)) {
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/art/runtime/arch/mips/ |
registers_mips.h | 60 FP = 30, // Saved value/frame pointer.
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/external/llvm/lib/Target/ARM/ |
ARMBaseRegisterInfo.cpp | 198 unsigned FP = TFI->hasFP(MF) ? 1 : 0; 199 return 10 - FP - (STI.isR9Reserved() ? 1 : 0); 320 // Thumb has trouble with negative offsets from the FP. Thumb2 has a limited 494 /// reference would be better served by a base register other than FP 538 // will be earlier than the FP, so we ignore those. 556 // The FP is only available if there is no dynamic realignment. We
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ARMFastISel.cpp | 467 // the combined constant into an FP reg. 490 // Require VFP2 for loading fp constants. [all...] |
/external/llvm/lib/Target/Mips/ |
MipsSEFrameLowering.cpp | 288 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP; 381 // Insert instruction "move $fp, $sp" at this location. 382 BuildMI(MBB, MBBI, dl, TII.get(ADDu), FP).addReg(SP).addReg(ZERO) 385 // emit ".cfi_def_cfa_register $fp" 387 nullptr, MRI->getDwarfRegNum(FP, true))); 406 unsigned FP = STI.isABI_N64() ? Mips::FP_64 : Mips::FP; 418 // Insert instruction "move $sp, $fp" at this location. 419 BuildMI(MBB, I, dl, TII.get(ADDu), SP).addReg(FP).addReg(ZERO) [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCRegisterInfo.cpp | 151 // The FP register is also not really a register, but is the representation 153 Reserved.set(PPC::FP); 227 unsigned FP = TFI->hasFP(MF) ? 1 : 0; 228 return 32 - FP - DefaultSafety; 754 // Replace the FrameIndex with base register with GPR1 (SP) or GPR31 (FP). [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreFrameLowering.cpp | 255 bool FP = hasFP(MF); 273 // If necessary, save LR and FP to the stack, as we EXTSP. 275 GetSpillList(SpillList, MFI, XFI, saveLR, FP); 303 if (FP) { 304 // Set the FP from the SP. 375 bool FP = hasFP(MF); 377 if (FP) // Restore the stack pointer. 380 // If necessary, restore LR and FP from the stack, as we EXTSP. 382 GetSpillList(SpillList, MFI, XFI, restoreLR, FP); 428 "LR & FP are always handled in emitPrologue") [all...] |
/art/runtime/arch/arm64/ |
registers_arm64.h | 63 FP = 29, 113 // Values for FP DRegisters - double precision floating point. 152 // Values for FP SRegisters - single precision floating point.
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/external/llvm/lib/ExecutionEngine/ |
ExecutionEngine.cpp | 326 Constant *FP = CS->getOperand(1); 327 if (FP->isNullValue()) 331 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP)) 333 FP = CE->getOperand(0); 336 if (Function *F = dyn_cast<Function>(FP)) [all...] |
/external/llvm/lib/IR/ |
LegacyPassManager.cpp | 274 FPPassManager *FP = static_cast<FPPassManager *>(PassManagers[N]); 275 return FP; [all...] |