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Searched
defs:Rd
(Results
1 - 6
of
6
) sorted by null
/external/chromium_org/third_party/mesa/src/src/mesa/swrast/
s_blend.c
489
const GLfloat
Rd
= dest[i][RCOMP];
511
sR =
Rd
;
516
sR = 1.0F -
Rd
;
673
dR =
Rd
;
678
dR = 1.0F -
Rd
;
743
r = Rs * sR +
Rd
* dR;
749
r = Rs * sR -
Rd
* dR;
755
r =
Rd
* dR - Rs * sR;
761
r = MIN2(
Rd
, Rs );
766
r = MAX2(
Rd
, Rs )
[
all
...]
/external/mesa3d/src/mesa/swrast/
s_blend.c
489
const GLfloat
Rd
= dest[i][RCOMP];
511
sR =
Rd
;
516
sR = 1.0F -
Rd
;
673
dR =
Rd
;
678
dR = 1.0F -
Rd
;
743
r = Rs * sR +
Rd
* dR;
749
r = Rs * sR -
Rd
* dR;
755
r =
Rd
* dR - Rs * sR;
761
r = MIN2(
Rd
, Rs );
766
r = MAX2(
Rd
, Rs )
[
all
...]
/external/llvm/lib/Target/AArch64/Disassembler/
AArch64Disassembler.cpp
669
unsigned
Rd
= fieldFromInstruction(Insn, 0, 5);
674
DecodeFPR128RegisterClass(Inst,
Rd
, Address, Decoder);
677
DecodeGPR64RegisterClass(Inst,
Rd
, Address, Decoder);
[
all
...]
/art/disassembler/
disassembler_arm.cc
274
// Show only
Rd
and Rm.
287
//
Rd
is unused (and not shown), and we don't show the 's' suffix either.
511
ArmRegister
Rd
(instr, 8);
523
args << Rt << "," <<
Rd
<< ", [" << Rn;
538
args <<
Rd
<< ", " << Rt << ", [" << Rn << ", #" << (imm8 << 2) << "]";
539
if (
Rd
.r == 13 ||
Rd
.r == 15 || Rt.r == 13 || Rt.r == 15 || Rn.r == 15 ||
540
Rd
.r == Rn.r ||
Rd
.r == Rt.r) {
550
Rd
= ArmRegister(instr, 0)
[
all
...]
/external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp
[
all
...]
/external/lldb/source/Plugins/Instruction/ARM/
EmulateInstructionARM.cpp
618
uint32_t
Rd
; // the destination register
622
Rd
= 7;
626
Rd
= Bits32(opcode, 15, 12);
641
if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 +
Rd
, addr))
677
uint32_t
Rd
; // the destination register
680
Rd
= 7;
683
Rd
= 12;
690
if (
Rd
== GetFramePointerRegisterNumber())
698
if (!WriteRegisterUnsigned (context, eRegisterKindDWARF, dwarf_r0 +
Rd
, sp))
740
uint32_t
Rd
; // the destination registe
[
all
...]
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